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MC33990DDR2 데이터시트(PDF) 3 Page - Freescale Semiconductor, Inc |
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MC33990DDR2 데이터시트(HTML) 3 Page - Freescale Semiconductor, Inc |
3 / 16 page Analog Integrated Circuit Device Data Freescale Semiconductor 3 33990 PIN CONNECTIONS PIN CONNECTIONS Figure 3. 33990 Pin Connections Table 1. 33990 Pin Definitions Pin Number Pin Name Definition 1 SLEEP Enables the transceiver when Logic 1 and disables the transceiver when Logic 0. 2 GND Device ground pin. 3 LOAD Accommodates an external pull-down resistor to ground to provide loss of ground protection. 4 BUS Waveshaped SAE Standard J-1850 Class B transmitter output and receiver input. 5 V BAT Provides device operating input power. 6 4X/LOOP Tristate input mode control; Logic 0 = normal waveshaping, Logic 1 = waveshaping disabled for 4X transmitting, high impedance = loopback mode. 7 TX Serial data input (DI) from the microcontroller to be transmitted onto Bus. 8 RX Bus received serial data output (DO) sent to the microcontroller. 2 3 4 8 7 6 5 11 2 4 3 8 7 5 6 RX TX V BAT 4X/LOOP SLEEP GND LOAD BUS |
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