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TDA10045H 데이터시트(Datasheet) 5 Page - NXP Semiconductors

부품명 TDA10045H
상세내용  DVB-T channel receiver
PDF  20 Pages
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제조사  PHILIPS [NXP Semiconductors]
홈페이지  http://www.nxp.com
Logo 

 
 5 page
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2001 Nov 08
5
Philips Semiconductors
Product specification
DVB-T channel receiver
TDA10045H
PINNING
SYMBOL
PIN
TYPE
DESCRIPTION
VDDD33
1
digital supply voltage for the pads (3.3 V typ.)
VSSD
2
digital ground supply (0 V
DS_SPARE3
3
O
spare delta-sigma output; managed by the DSP to generate an analog level
(after a RC low-pass filter)
VAGC
4
O
output value from the Delta-Sigma modulator, used to control a log-scaled
amplifier (after analog filtering)
SCL_EEP
5
O
extra I2C-bus clock to download DSP code from an external EEPROM (optional
mode); can be connected to the master I2C-bus
VDDD33
6
digital supply voltage for the pads (3.3 V typ.)
VSSD
7
digital ground supply (0 V)
SDA_EEP
8
I/OD
extra I2C-bus data bus to download DSP code from an external EEPROM
(optional mode). It can be connected to the master I2C-bus; this pin is
open-drain which requires an external pull-up resistor (to VDDD33 or VDDD50),
even if not used.
SCL_TUN
9
OD(1)
tuner I2C-bus serial clock signal; this signal is derived from the master SCL and
is open-drain which requires an external pull-up resistor (to VDDD33 or VDDD50),
even if not used
SDA_TUN
10
I/OD
tuner I2C-bus serial data signal; this signal is derived from the master SDA and
is open-drain which requires an external pull-up resistor (to VDDD33 or VDDD50),
even if not used
SCL
11
I(2)
I2C-bus master serial clock; up to 700 kbit/s
SDA
12
I/OD
I2C-bus master serial data input/output, open-drain I/O pad, which requires an
external pull-up resistor (to VDDD33 or VDDD50)
n.c.
13
not connected
CLR#
14
I(2)
asynchronous reset signal; active LOW
EEPADDR
15
I(2)
EEPADDR is the LSB of the I2C-bus address of the EEPROM. The MSBs are
internally set to 101000. Therefore the complete I2C-bus address of the
EEPROM is (MSB to LSB): 1, 0, 1, 0, 0, 0, EEPADDR.
SADDR[1:0]
16 and 17
I(2)
SADDR[1:0] are the 2 LSBs of the I2C-bus address of the TDA10045; the MSBs
are internally set to 00010; therefore the complete I2C-bus address of the
TDA10045 is (MSB to LSB): 0, 0, 0, 1, 0, SADDR[1] and SADDR[0]
VDDD18
18
digital supply voltage for the core (1.8 V typ.)
VSSD
19
digital ground supply (0 V)
TM[3:0]
20 to 23
I(2)
test mode bus; for test purpose; must be set to ‘0000’
SCAN_EN
24
I(2)
scan enable for production test; connected to GND
VDDD50
25
digital supply voltage (5 V typ.); can be set to 3.3 V (with caution) if the 5 V
tolerant I/O is not required
VSSD
26
digital ground supply (0 V)
DWNLOAD
27
I(2)
processor control, boot mode; if set to logic 0, the DSP downloads the software
from an external EEPROM on the dedicated I2C-bus (pins SDA_EEP and
SCL_EEP). If set to logic 1 the software is downloaded in the I2C-bus register
CODE_IN from the host; in this case the external EEPROM is not needed.
SP_IN[1:0]
28 and 29
I(2)
spare inputs




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