SN74AVCAH164245

16-BIT DUAL-SUPPLY BUS TRANSCEIVER

WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS

SCES396 – JULY 2002

3

POST OFFICE BOX 655303

FUNCTION TABLE

(each 8-bit section)

INPUTS

OPERATION

OE

DIR

OPERATION

L

L

B data to A bus

L

H

A data to B bus

H

X

Isolation

logic diagram (positive logic)

To Seven Other Channels

1DIR

1A1

1B1

1OE

To Seven Other Channels

2DIR

2A1

2B1

2OE

1

47

24

36

48

2

25

13

Pin numbers shown are for the DGG and DGV packages.