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74LVTH16240DGGRE4 데이터시트(PDF) 2 Page - Texas Instruments |
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74LVTH16240DGGRE4 데이터시트(HTML) 2 Page - Texas Instruments |
2 / 13 page www.ti.com DESCRIPTION/ORDERING INFORMATION (CONTINUED) 47 1A1 46 1A2 44 1A3 43 1A4 1Y1 2 1Y2 3 1Y3 5 1Y4 6 41 2A1 40 2A2 38 2A3 37 2A4 2Y1 8 2Y2 9 2Y3 11 2Y4 12 36 3A1 35 3A2 33 3A3 32 3A4 3Y1 13 3Y2 14 3Y3 16 3Y4 17 30 4A1 29 4A2 27 4A3 26 4A4 4Y1 19 4Y2 20 4Y3 22 4Y4 23 EN1 1 EN4 24 1OE 2OE 3OE 4OE EN2 48 EN3 25 (1) Thissymbolisinaccordancewith ANSI/IEEEStd91-1984andIECPublication617-12. 1 1 1 2 1 3 1 4 SN54LVTH16240 ,, SN74LVTH16240 3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS684D – MARCH 1997 – REVISED DECEMBER 2006 The devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. The devices provide inverting outputs and symmetrical active-low output-enable (OE) inputs. When VCC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict. The SN54LVTH16240 is characterized for operation over the full military temperature range of –55 °C to 125°C. The SN74LVTH16240 is characterized for operation from –40 °C to 85°C. FUNCTION TABLE (each 4-bit buffer) INPUTS OUTPUTS Y OE A L H L L L H H X Z LOGIC SYMBOL(1) 2 Submit Documentation Feedback |
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