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TDA4850 데이터시트(PDF) 9 Page - NXP Semiconductors |
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TDA4850 데이터시트(HTML) 9 Page - NXP Semiconductors |
9 / 20 page 1997 Jun 05 9 Philips Semiconductors Product specification Horizontal and vertical deflection controller for VGA/XGA and multi-frequency monitors TDA4850 Horizontal mode detector output (VGA mode) V7 output saturation voltage LOW (for modes 1, 2 and 3) I7 =6mA − 0.275 0.33 V output voltage HIGH mode 4 −− VP V I7 load current to force VGA mode-dependent vertical and parabola amplitudes modes 1, 2 and 3 2 − 6mA output current mode 4 − 0 − mA VGA/multi-frequency mode switch V7 input voltage LOW to force multi-frequency mode 0 − 50 mV Horizontal comparator PLL1 V17 upper control voltage limitation − 5.0 − V lower control voltage limitation − 1.2 − V I17 control current see Fig.3 −±300 −µA Horizontal oscillator fosc centre frequency R18 =12kΩ (pin 18); C19 = 2.2 nF (pin 19) − 31.45 − kHz ∆f osc deviation of centre frequency −−±3.0 % TC temperature coefficient −−±150 10−6/K ϕ H/tH relative holding/catching range ±6 ±6.5 ±7.3 % R18 external oscillator resistor 9 − 18 k Ω V18 voltage at reference current input (pin 18) PLL1 and PLL2 locked; Vref = 6.25 V − 3.125 − V ∆V 18 control voltage −±205 − mV Horizontal PLL2; see Fig.3 V2 upper clamping level of flyback input I2 =6mA − 5.5 − V lower clamping level of flyback input I2 = −1mA −−0.75 − V H-flyback slicing level − 3.0 − V I2 input current H-scan; V8 < 0.9 V −0.5 −− mA H-flyback; V8 > 1.8 V −−−0.2 mA td/tH delay between middle of sync and middle of H-flyback related to tH − 3.2 − % V20 upper control voltage limitation − 4.6 − V lower control voltage limitation − 1.6 − V I20 control current −±200 −µA ∆t/tH PLL2 control range related to tH 30 −− % SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT |
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