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TDA8351 데이터시트(PDF) 6 Page - NXP Semiconductors

부품명 TDA8351
상세설명  DC-coupled vertical deflection circuit
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제조업체  PHILIPS [NXP Semiconductors]
홈페이지  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

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1999 Sep 27
6
Philips Semiconductors
Product specification
DC-coupled vertical deflection circuit
TDA8351
CHARACTERISTICS
VP = 17.5 V; Tamb =25 °C; VFB = 45 V; fi = 50 Hz; II(sb) = 400 µA; measured in test circuit of Fig.3; unless otherwise
specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
DC supply
VP
operating supply voltage
9.0
25
V
VFB
flyback supply voltage
VP
50
V
note 1
VP
60
V
IP
supply current
no signal; no load
30
55
mA
Vertical circuit
VO
output voltage swing (scan)
Idiff = 0.6 mA (p-p);
Vdiff = 1.8 V (p-p);
IO = 3 A (p-p)
19.8
−−
V
LE
linearity error
IO = 3 A (p-p); note 2
13%
IO = 50 mA (p-p); note 2 −
13%
VO
output voltage swing (flyback)
VO(A) − VO(B)
Idiff = 0.3 mA;
IO = 1.5 A
39
V
VDF
forward voltage of the internal
efficiency diode (VO(A) − VFB)
IO = −1.5 A;
Idiff = 0.3 mA
−−
1.5
V
|I
os|
output offset current
Idiff =0;
II(sb) =50to500 µA
−−
30
mA
|V
os|
offset voltage at the input of the
feedback amplifier (VI(fb) − VO(B))
Idiff =0;
II(sb) =50to500 µA
−−
18
mV
∆VosT
output offset voltage as a function
of temperature
Idiff =0
−−
72
µV/K
VO(A)
DC output voltage
Idiff = 0; note 3
8.0
V
Gvo
open-loop voltage gain (V7-4/V1-2) notes 4 and 5
80
dB
open loop voltage gain
(V7-4/V9-4; V1-2 =0)
note 4
80
dB
VR
voltage ratio V1-2/V9-4
0
dB
fres
frequency response (
−3 dB)
open loop; note 6
40
Hz
GI
current gain (IO/Idiff)
5000
∆G
cT
current gain drift as a function of
temperature
−−
10−4
K
II(sb)
signal bias current
50
400
500
µA
IFB
flyback supply current
during scan
−−
100
µA
PSRR
power supply ripple rejection
note 7
80
dB
VI(DC)
DC input voltage
2.7
V
VI(CM)
common mode input voltage
II(sb) =0
0
1.6
V
Ibias
input bias current
II(sb) =0
0.1
0.5
µA
IO(CM)
common mode output current
∆II(sb) = 300 µA (p-p);
fi = 50 Hz; Idiff =0
0.2
mA


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