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54VCXH162245 데이터시트(HTML) 1 Page - STMicroelectronics

부품명 54VCXH162245
상세내용  Rad hard low voltage CMOS 16-bit bus buffer transceiver (3-state) with 3.6V tolerant inputs and outputs
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제조사  STMICROELECTRONICS [STMicroelectronics]
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54VCXH162245 데이터시트(HTML) 1 Page - STMicroelectronics

 
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July 2007
Rev 6
1/18
18
54VCXH162245
Rad hard low voltage CMOS 16-bit bus buffer transceiver
(3-state) with 3.6V tolerant inputs and outputs
Features
1.65 to 3.6V inputs and outputs
High speed A outputs:
–tPD = 3.4ns at VCC = 3.0 to 3.6V
–tPD = 4.3ns at VCC = 2.3 to 2.7V
Symmetrical impedance A output:
–|IOH| = IOL = 12mA (Min) at VCC = 3.0V
–|IOH| = IOL = 8mA (Min) at VCC = 2.3V
High speed B outputs:
–tPD = 2.5ns (Max) at VCC = 3.0 to 3.6V
–tPD = 3.2ns (Max) at VCC = 2.3 to 2.7V
Symmetrical impedance A output:
–|IOH| = IOL = 24mA (Min) at VCC = 3.0V
–|IOH| = IOL = 18mA (Min) at VCC = 2.3V
Power down protection on inputs and outputs
26Ω serie resistors in A port output
Operating voltage range:
–VCC(Opr) = 1.65V to 3.6V
Pin and function compatible with 54 SERIES
H162245
Bus hold provided on both sides
Cold spare function
Latch-up performance exceeds
300mA (JESD 17)
ESD performance:
– HBM > 2000V
(MIL STD 883 method 3015); MM > 200V
300KRad Mil1019.6 Condition A, (RHA QML
qualification extension undergone)
No SEL, no SEU under 72 Mev/cm2/mg LET
heavy ions irradiation
QML qualified product
Device fully compliant with
DSCC SMD 5962-02508
Description
The 54VCXH162245 is a low voltage CMOS 16
bit bus transceiver (3-state) fabricated with sub-
micron silicon gate and five-layer metal wiring
C2MOS technology. It is ideal for low power and
very high speed 1.65 to 3.6V applications; it can
be interfaced to 3.6V signal environment for both
inputs and outputs.
This IC is intended for two-way asynchronous
communication between data buses; the direction
of data transmission is determined by DIR input.
The two enable inputs nG can be used to disable
the device so that the buses are effectively
isolated. The device circuits is including 26
series resistance in the A port outputs. These
resistors permit to reduce line noise in high speed
applications. Bus hold on data inputs is provided
in order to eliminate the need for external pull-up
or pull-down resistor.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage. All floating bus terminals during High Z
State must be held HIGH or LOW.
Flat-48
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관련 부품명

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