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SI571 데이터시트(PDF) 8 Page - Silicon Laboratories |
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SI571 데이터시트(HTML) 8 Page - Silicon Laboratories |
8 / 26 page Si570/Si571 8 Rev. 0.3 Table 6. CLK± Output Phase Jitter (Si571) Parameter Symbol Test Condition Min Typ Max Units Phase Jitter (RMS)1,2,3 for FOUT > 500 MHz φ J Kv = 33 ppm/V 12 kHz to 20 MHz (OC-48) 50 kHz to 80 MHz (OC-192) — — 0.26 0.26 — — ps Kv = 45 ppm/V 12 kHz to 20 MHz (OC-48) 50 kHz to 80 MHz (OC-192) — — 0.27 0.26 — — Kv = 90 ppm/V 12 kHz to 20 MHz (OC-48) 50 kHz to 80 MHz (OC-192) — — 0.32 0.26 — — Kv = 135 ppm/V 12 kHz to 20 MHz (OC-48) 50 kHz to 80 MHz (OC-192) — — 0.40 0.27 — — Kv = 180 ppm/V 12 kHz to 20 MHz (OC-48) 50 kHz to 80 MHz (OC-192) — — 0.49 0.28 — — Kv = 356 ppm/V 12 kHz to 20 MHz (OC-48) 50 kHz to 80 MHz (OC-192) — — 0.87 0.33 — — Notes: 1. Differential Modes: LVPECL/LVDS/CML. Refer to AN255, AN256, and AN266 for further information. 2. For best jitter and phase noise performance, always choose the smallest KV that meets the application’s minimum APR requirements. See “AN266: VCXO Tuning Slope (KV), Stability, and Absolute Pull Range (APR)” for more information. 3. See “AN255: Replacing 622 MHz VCSO devices with the Si550 VCXO” for comparison highlighting power supply rejection (PSR) advantage of Si55x versus SAW-based solutions. |
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