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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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TPD2E001DZDR 데이터시트(PDF) 2 Page - Texas Instruments |
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TPD2E001DZDR 데이터시트(HTML) 2 Page - Texas Instruments |
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2 / 11 page  www.ti.com N.C. – Notinternallyconnected DRSPACKAGE (TOP VIEW) GND V CC N.C. IO1 IO2 N.C. GND 4 5 6 3 2 1 DRY PACKAGE (TOP VIEW) IO1 N.C. N.C. IO2 GND V CC 3 2 6 5 4 1 GND V CC N.C. DRL PACKAGE (TOP VIEW) IO1 IO2 2 3 4 5 1 YFP PACKAGE (TOP VIEW) IO1 IO2 V CC GND 3 4 1 2 IO2 GND DZDPACKAGE (TOP VIEW) IO1 V CC 2 3 4 1 PR EVIE W PR EV IE W IO2 GND IO1 V CC TPD2E001 LOW-CAPACITANCE 2-CHANNEL ±15-kV ESD-PROTECTION ARRAY FOR HIGH-SPEED DATA INTERFACES SLLS684C – JULY 2006 – REVISED MAY 2007 LOGIC BLOCK DIAGRAM PIN DESCRIPTION DRS DRL DRY NAME FUNCTION NO. NO. NO. 1, 4 3, 5 3, 6 IOx ESD-protected channel 3 4 4 GND Ground 6 1 1 VCC Power-supply input. Bypass VCC to GND with a 0.1-µF ceramic capacitor. 5 2 2, 5 NC No connection. Not internally connected. EP EP Exposed pad. Connect to GND. 2 Submit Documentation Feedback |
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