전자부품 데이터시트 검색엔진 |
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STK14CA8-NF45TR 데이터시트(PDF) 2 Page - Simtek Corporation |
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STK14CA8-NF45TR 데이터시트(HTML) 2 Page - Simtek Corporation |
2 / 19 page 2 February 2007 Document Control #ML0022 Rev 1.5 STK14CA8 PACKAGES VCAP DQ0 DQ1 DQ2 G A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 VCC A15 A13 A8 A11 VSS DQ 6 A10 DQ 7 DQ5 DQ4 DQ3 A9 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 W HSB E 32 Pin SOIC PIN DESCRIPTIONS Pin Name I/O Description A16-A0 Input Address: The 17 address inputs select one of 131,072 bytes in the nvSRAM array DQ7-DQ0 I/O Data: Bi-directional 8-bit data bus for accessing the nvSRAM E Input Chip Enable: The active low E input selects the device W Input Write Enable: The active low W enables data on the DQ pins to be written to the address location latched by the falling edge of E G Input Output Enable: The active low G input enables the data output buffers during read cycles. De-asserting G high caused the DQ pins to tri-state. VCC Power Supply Power: 3.0V, +20%, -10% HSB I/O Hardware Store Busy: When low this output indicates a Store is in progress. When pulled low external to the chip, it will initiate a nonvolatile STORE operation. A weak pull up resistor keeps this pin high if not connected. (Connection Optional). VCAP Power Supply Autostore Capacitor: Supplies power to nvSRAM during power loss to store data from SRAM to nonvolatile storage elements. VSS Power Supply Ground (Blank) No Connect Unlabeled pins have no internal connections. 48 Pin SSOP VCAP VSS A16 A14 A12 A7 A6 A5 A4 VCC A15 A13 A8 DQ0 VSS DQ6 A9 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 W HSB DQ1 DQ2 G A3 A2 A1 A0 DQ5 A10 DQ7 DQ4 DQ3 VCC 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 E A11 Relative PCB area usage. See website for detailed package size specifications. |
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유사한 설명 - STK14CA8-NF45TR |
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