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SI8513-B-GM 데이터시트(PDF) 10 Page - Silicon Laboratories |
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SI8513-B-GM 데이터시트(HTML) 10 Page - Silicon Laboratories |
10 / 24 page Si85xx 10 Preliminary Rev. 0.1 2.7. FAULT Output The FAULT output (Si8517/8/9) guards against Si85xx output signal errors caused by missing reset cycles. FAULT is asserted when a measurement cycle exceeds the internal watchdog timer times limit of tWD. FAULT can be used to alert a local microcontroller or digital power controller of a current sense failure, or initiate a system shutdown. To detect faults, tie a 200 k Ω resistor from TRST/FAULT to VDD. 3. Application Information 3.1. Board Layout The Si85xx is connected in the series path of the current to be measured. The Si85xx must be located as far away from away from transformer and other magnetic field sources as possible. Like other analog components, the Si85xx should be powered from a low- noise DC source, and preferably connected to a low noise analog ground plane. Recommended bypass capacitors are 1 µF in parallel with a 0.1 µF, positioned as close to the Si85xx as possible. When using the Si850x (single output versions), all 3 ground pins MUST be connected to the same ground point, and both VDD and VDD2 pins MUST be tied to VDD. 3.2. Device Configuration Configuring the Si85xx involves the following steps: 1. Selecting an output mode 2. Configuring integrator reset timing 3. Setting integrator reset time tR 3.2.1. Device Selection The Si85xx family offers three output modes: Single output (Si850x), and 2 and 4-Wire Ping Pong (Si851x). The Si851x products can be configured to operate in all three of these output modes. The Si850x products operate ONLY in Single output mode. Most half-wave and single-phase applications require only Single output mode, and will typically use the Si850x. In Single output mode, output current always appears on the OUT pin (Si850x) or the OUT1 pin (Si851x). A single integrator reset signal is typically sufficient when operating in this mode. Ping-Pong mode routes the current waveform to two different output pins on alternate measurement cycles. It is useful in full-wave and push-pull topologies where external circuitry can be used to monitor and/or control transformer flux balance. (Note: The Applications section of this data sheet (Section 3) shows design examples using both output modes in various power topologies.) 2-wire Ping-Pong mode is useful mainly in non- overlapping two-phase buck converters, but may also be used in full-bridge applications. In this output mode, reset inputs R1 and R2 are used, and input R3 is grounded. Measured current appears on OUT1 when R2 is high, and appears on OUT2 when R1 is high as shown in the full-bridge timing example of Figure 9. Figure 9. Full-Bridge Timing Example A 4-Wire Ping-Pong mode is recommended for full-bridge applications over 2-wire because it uses all four inputs making the reset function tolerant to single-point signal failures. In 4-Wire Ping-Pong mode, current appears on OUT2 when R1 is high and R2 is low; and appears on OUT1 when R3 is high and R4 is low as shown in the full-bridge timing example of Figure 10. Table 3 shows the states of the Mode and R4 inputs that select each output, and the resulting reset logic functions and truth tables. R1 R2 RESET Si85xx State MEASURE OUT1 OUT2 MEASURE RESET tR tR TIME |
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