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74ALVTH162244DLG4 ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 7 Page - Texas Instruments

๋ถ€ํ’ˆ๋ช… 74ALVTH162244DLG4
์ƒ์„ธ๋‚ด์šฉ  2.5-V/3.3-V 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
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74ALVTH162244DLG4 ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 7 Page - Texas Instruments

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SN54ALVTH162244, SN74ALVTH162244
2.5-V/3.3-V 16-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCES074E โ€“ JUNE 1996 - REVISED JANUARY 1999
7
POST OFFICE BOX 655303
โ€ข DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
VCC = 2.5 V ยฑ 0.2 V
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
VOH
VOL
th
tsu
From Output
Under Test
CL = 30 pF
(see Note A)
LOAD CIRCUIT
S1
Open
GND
500
โ„ฆ
500
โ„ฆ
Output
Control
(low-level
enabling)
Output
Waveform 1
S1 at 2
ร— VCC
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
tPZL
tPZH
tPLZ
tPHZ
0 V
VOL + 0.15 V
VOH โ€“ 0.15 V
0 V
VCC
0 V
0 V
tw
VCC
VCC
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
Timing
Input
Data
Input
Input
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
2
ร— VCC
GND
TEST
S1
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
โ‰ค 10 MHz, ZO = 50 โ„ฆ, tr โ‰ค 2 ns, tf โ‰ค 2 ns.
D. The outputs are measured one at a time with one transition per measurement.
0 V
VCC
VCC/2
tPHL
VCC/2
VCC/2
VCC
0 V
VOH
VOL
Input
Output
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VCC/2
VCC/2
tPLH
2
ร— VCC
VCC
Figure 1. Load Circuit and Voltage Waveforms


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