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CAT25010ZIT3 데이터시트(PDF) 8 Page - Catalyst Semiconductor |
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CAT25010ZIT3 데이터시트(HTML) 8 Page - Catalyst Semiconductor |
8 / 17 page CAT25010, CAT25020, CAT25040 Doc. No. MD-1006 Rev. T 8 © Catalyst Semiconductor, Inc. Characteristics subject to change without notice Write Status Register The Status Register is written by sending a WRSR instruction according to timing shown in Figure 6. Only bits 2 and 3 can be written using the WRSR command. Write Protection When WP ¯¯¯ input is low all write operations to the memory array and Status Register are inhibited. WP ¯¯¯ going low while CS ¯¯ is still low will interrupt a write to the status register. If the internal write cycle has already been initiated, WP ¯¯¯ going low will have no effect on any write operation to the Status Register. The WP ¯¯¯ input timing is shown in Figure 7. Figure 6. WRSR Timing Note: Dashed Line = mode (1, 1) - - - - - - Figure 7. WP ¯¯¯ Timing Note: Dashed Line = mode (1, 1) - - - - - - 01 2 3 4 5 6 7 8 10 911 12 13 14 SCK SI MSB HIGH IMPEDANCE DATA IN 15 SO CS 7 6 5 4 3 2 10 00 0 0 0 0 0 1 OPCODE CS SCK WP WP t WPS t WPH |
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유사한 설명 - CAT25010ZIT3 |
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