전자부품 데이터시트 검색엔진 |
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TP2510 데이터시트(PDF) 1 Page - Supertex, Inc |
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TP2510 데이터시트(HTML) 1 Page - Supertex, Inc |
1 / 5 page TP2510 Features Low threshold — -2.4V max. High input impedance Low input capacitance — 125pF max. Fast switching speeds Low on resistance Free from secondary breakdown Low input and output leakage Complementary N and P-channel devices Applications Logic level interfaces — ideal for TTL and CMOS Solid state relays Battery operated systems Photo voltaic drives Analog switches General purpose line drivers Telecom switches ► ► ► ► ► ► ► ► ► ► ► ► ► ► ► General Description These low threshold enhancement-mode (normally-off) tran- sistors utilize a vertical DMOS structure and Supertex’s well- proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, these devices are free from thermal runaway and thermally-induced secondary breakdown. Supertex’s vertical DMOS FETs are ideally suited to a widerange of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Switching Waveforms and Test Circuit Low Threshold P-Channel Enhancement Mode Vertical DMOS FETs Thermal Characteristics Package I D continuous† (mA) I D pulsed (A) Power Dissipation @ T A = 25 OC (W) θ jc (OC/W) θ jc (OC/W) I DR † (mA) I DRM (A) TO-243AA -480 -2.5 1.6‡ 15 78‡ -480 -2.5 † I D (continuous) is limited by max rated Tj. ‡ Mounted on FR5 board, 25mm x 25mm x 1.57mm. 90% 10% 90% 90% 10% 10% PULSE GENERATOR VDD RL Output D.U.T. t (ON) t d(ON) t (OFF) t d(OFF) t F t r INPUT INPUT OUTPUT 0V V DD RGEN 0V -10V |
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