전자부품 데이터시트 검색엔진 |
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74LVTH162374MEA 데이터시트(PDF) 3 Page - Fairchild Semiconductor |
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74LVTH162374MEA 데이터시트(HTML) 3 Page - Fairchild Semiconductor |
3 / 10 page ©2000 Fairchild Semiconductor Corporation www.fairchildsemi.com 74LVTH162374 Rev. 1.0.0 3 Functional Description The LVTH162374 consists of sixteen edge-triggered flip-flops with individual D-type inputs and 3-STATE true outputs. The device is byte controlled with each byte functioning identically, but independent of the other. The control pins can be shorted together to obtain full 16-bit operation. Each byte has a buffered clock and buffered Output Enable common to all flip-flops within that byte. The description which follows applies to each byte. Each flip-flop will store the state of their indi-vidual D-type inputs that meet the setup and hold time requirements on the LOW-to-HIGH Clock (CPn) transition. With the Output Enable (OEn) LOW, the contents of the flip-flops are available at the outputs. When OEn is HIGH, the outputs go to the high impedance state. Operation of the OEn input does not affect the state of the flip-flops. Logic Diagrams Byte 1 (0:7) Byte 2 (8:15) Please note that these diagrams are provided for the understanding of logic operation and should not be used to estimate propagation delays. |
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