전자부품 데이터시트 검색엔진 |
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ML145157 데이터시트(PDF) 7 Page - LANSDALE Semiconductor Inc. |
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ML145157 데이터시트(HTML) 7 Page - LANSDALE Semiconductor Inc. |
7 / 35 page www.lansdale.com Page 7 of 35 Issue A their respective programmed values, and the above sequence repeated. This provides for a total programmable divide value (NT)=N•P+A where P and P + 1 represent the dual–modulus prescaler divide values respectively for high and low MC lev- els, N the number programmed into the ÷ N counter, and A the number programmed into the ÷ A counter. LD Lock Detector Output (Pin 28) Essentially a high level when loop is locked (fR, fV of same phase and frequency). Pulses low when loop is out of lock. POWER SUPPLY VDD Positive Power Supply (Pin 3) The positive power supply potential. This pin may range from + 3 to + 9 V with respect to VSS. VSS Negative Power Supply (Pin 2) The most negative supply potential. This pin is usually- ground. LANSDALE Semiconductor, Inc. ML145152 TYPICAL APPLICATIONS Figure 1. Synthesizer for Land Mobile Radio VHF Bands NOTES: 1. Off–chip oscillator optional. 2. The φR and φV outputs are fed to an external combiner/loop filter. See the Phase–Locked Loop — Low–Pass Filter Design page for additional information. The φR and φV outputs swing rail–to–rail. Therefore, the user should be careful not to exceed the common mode input range of the op amp used in the combiner/loop filter. LOCK DETECT SIGNAL 10.24 MHz NOTE 1 R1 MC33171 NOTE 2 + 150 – 175 MHz 5 kHz STEPS ML12017 ÷ 64/65 PRESCALER ML145152 MC LD A0 A5 N9 OSCin VDD VSS OSCout RA2 RA1 φR φV fin – VCO RA0 N0 + V R1 R2 C R2 C “1” “1” “1” NO CONNECTS CHANNEL PROGRAMMING |
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