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PIN ASSIGNMENTS

REF

R

COM

R1

R

OFS

R

FB

I

OUT

AGND

LDAC

WR

D13

D12

D11

D10

D9

RST

NC

NC

D0

D1

V

DD

DGND

D2

D3

D4

D5

D6

D7

D8

1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15

DAC8806

DAC8806

SBAS385A – APRIL 2006 – REVISED JUNE 2006

ELECTRICAL CHARACTERISTICS (continued)

All specifications at –40

°C to +85°C, V

operating temperature, unless otherwise noted.

DAC8806

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

POWER REQUIREMENTS

2.7

5.5

V

Logic inputs = 0V

5

µA

3

5

µA

1

2.5

µA

Output current settling time

0.5

µs

Reference multiplying BW

8

MHz

DAC glitch impulse

2

nV–s

Data = 1FFFh to 2000h to 1FFFh

–70

dB

Digital feedthrough

2

nV–s

Any code change

Total harmonic distortion

–105

dB

Output spot noise voltage

10

nV/

√Hz

(2)

Specified by design and characterization; not production tested.

TERMINAL FUNCTIONS

PIN #

NAME

DESCRIPTION

1

REF

Reference input and 4-quadrant Resistor (R2).

Center tap of two 4-quadrant resistors

2

(R1 and R2).

3

R1

4-quadrant resistor (R1).

4

Bipolar offset resistor

5

Internal matching feedback resistor

6

DAC current output

7

AGND

Analog ground

Digital input load DAC control. When LDAC is high,

8

LDAC

data is loaded from input register into a DAC

register, updating the DAC output.

Write control digital input. Active low. When WR is

9

WR

taken to logic low, data is loaded from the digital

input pins (D0–D13) into a14-bit input register.

10–21

D13–D2

Digital input data bits. D13 is MSB.

22

DGND

Digital ground

23

Positive power supply

24, 25

D1, D0

Digital Input data bits. D0 is LSB.

26, 27

NC

No connection

Reset. Active low. When RST is taken to logic low,

28

RST

the DAC output and all internal registers are set to

zero code for the DAC8806.

4

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