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TC74HC652AP 데이터시트(PDF) 1 Page - Toshiba Semiconductor |
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TC74HC652AP 데이터시트(HTML) 1 Page - Toshiba Semiconductor |
1 / 9 page TC74HC652AP 2007-10-01 1 TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC652AP Octal Bus Transceiver/Register (3-state) The TC74HC652A is high speed CMOS OCTAL BUS TRANSCEIVER/REGISTER fabricated with silicon gate CMOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. This device is bus transceiver with 3-state outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the internal registers. When the enable input GAB and GBA are held high, the A1 thru A8 become inputs and the B1 thru B8 become outputs. When the GAB and GBA are held low, the A1 thru A8 become output and the B1 thru B8 become inputs. When GAB is low and GBA is high, the outputs functions of the A and B Busses are disabled. The select inputs (SAB, SBA) can multiplex sort and real-time (transparent mode) data. Data on the A Bus or B Bus can be clocked into the registers on the positive going transition of either CAB or CBA clock inputs, respectively. All inputs are equipped with protection circuits against static discharge or transient excess voltage. Features (Note 1) (Note 2) • High speed: fmax = 73 MHz (typ.) at VCC = 5 V • Low power dissipation: ICC = 4 μA (max) at Ta = 25°C • High noise immunity: VNIH = VNIL = 28% VCC (min) • Output drive capability: 15 LSTTL loads • Symmetrical output impedance: |IOH| = IOL = 6 mA (min) • Balanced propagation delays: tpLH ∼− tpHL • Wide operating voltage range: VCC (opr) = 2 to 6 V • Pin and function compatible with 74LS652 Note 1: Do not apply a signal to any bus terminal when it is in the output mode. Damage may result. Note 2: All floating (high impedance) bus terminals must have their input levels fixed by means of pull up or pull down resistors. Weight : 1.50 g (typ.) |
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