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TA76L431FT 데이터시트(PDF) 3 Page - Toshiba Semiconductor |
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TA76L431FT 데이터시트(HTML) 3 Page - Toshiba Semiconductor |
3 / 9 page TA76L431FT/S 2006-11-06 3 Typical Application Circuits (1) 2.49 V Reference (VKA = VREF) (2) Shunt regulator (VKA > VREF) Precautions during Use 1. TA76L431FT, TA76L431S These products contain MOS elements. Please take care to avoid generating static electricity when handling these devices. 2. TA76L431FT, TA76L431S The oscillation frequency of these devices is determined by the value of the capacitor connected between the anode and the cathode. When establishing maximum operating condition parameters, please derate the maximum rating values specified in these datasheets so as to allow an operational safety margin. Use of a laminated ceramic capacitor is recommended 3. Precautions when handling anode pin of TA76L431FT Pin 2 and pin 5 should normally be shorted together. If only pin 5 is used, pin 2 should either be left open or always kept at a lower potential than pin 5. Do not leave pin 5 open and use pin 2 only. Absolute Maximum Ratings (Ta = 25°C) Characteristics Symbol Rating Unit Cathode voltage VKA 20 V Cathode current IK 50 mA Cathode-anode reverse current −IK 50 mA Reference voltage VREF 7 V Reference current IREF 50 μA Reference-anode reverse current −IREF 10 mA TA76L431FT 0.45 (Note 1) Power dissipation TA76L431S PD 0.8 W TA76L431FT 277 (Note 1) Thermal resistance TA76L431S Rth 156 ºC/W Operating temperature Topr −40∼85 ºC Junction temperature Tj 150 ºC Storage temperature Tstg −55∼150 ºC Note 1: Glass epoxy substrate mounting: 30 mm × 30 mm × 0.8 mmt (Cu pad area 35 mm 2 ) Note 2: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/Derating Concept and Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). VOUT = 2.49 V VIN VIN VOUT R1 I R R 1 V REF 2 1 REF ⋅ + ⎟⎟ ⎠ ⎞ ⎜⎜ ⎝ ⎛ + = VOUT R1 R2 VREF |
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