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TC74LVXC3245FS 데이터시트(PDF) 1 Page - Toshiba Semiconductor |
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TC74LVXC3245FS 데이터시트(HTML) 1 Page - Toshiba Semiconductor |
1 / 10 page TC74LVXC3245FS 2007-10-17 1 TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74LVXC3245FS Dual Supply Octal Configurable Voltage Interface Bus Transceiver The TC74LVXC3245FS is a dual supply, advanced high-speed CMOS octal configurable voltage interface bus transceiver fabricated with silicon gate CMOS technology. Designed for use as an interface between a 3.3 V bus and a 3.3V to 5 V bus in mixed 3.3 V/5 V supply systems’ it achieves high-speed operation while maintaining the CMOS low power dissipation. It is intended for 2 way asynchronous communication between data busses. The direction of data transmission is determined by the level of the DIR input. The enable input ( G ) can be used to disable the device so that the buses are effectively isolated. The A-port interfaces with the 3.3-V bus, the B-port with the 3.3V to 5V bus. This device will allow the VCCB voltage source pin and I/O pins on the B port to float when G is “H”. All inputs are equipped with protection circuits against static discharge or transient excess voltage. Features • Bi-directional interface between 3 V and 5 V buses • High-speed: tpd = 8.5 ns (max) (VCCA = 3.3 V, VCCB = 5.0 V) • Low power dissipation: ICC = 8 μA (max) (Ta = 25°C) • Symmetrical output impedance: IOUTA = ±24 mA (min) IOUTB = ±24 mA (min) (VCCA = VCCB = 3.0 V) • Low noise: VOLP = 1.5 V (max) • Flexible VCCB operating range • Allows B port and VCCB to float simultaneously when G is “H” • Package: SSOP (shrink small outline package) Note: Do not apply a signal to any bus pins when it is in the output mode. Damage may result. All floating (high impedance) bus pin must have their input levels fixed by means of pull-up or pull-down resistors. Weight: 0.14 g (typ.) |
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