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TC74VHCT00AFK 데이터시트(PDF) 1 Page - Toshiba Semiconductor |
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TC74VHCT00AFK 데이터시트(HTML) 1 Page - Toshiba Semiconductor |
1 / 9 page TC74VHCT00AF/AFN/AFT/AFK 2007-10-17 1 TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VHCT00AF,TC74VHCT00AFN,TC74VHCT00AFT,TC74VHCT00AFK Quad 2-Input NAND Gate The TC74VHCT00A is an advanced high speed CMOS 2-INPUT NAND GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The input voltage are compatible with TTL output voltage. This device may be used as a level converter for interfacing 3.3 V to 5 V system. Input protection and output circuit ensure that 0 to 5.5 V can be applied to the input and output (Note) pins without regard to the supply voltage. These structure prevents device destruction due to mismatched supply and input/output voltages such as battery back up, hot board insertion, etc. Note: VCC = 0 V Features • High speed: tpd = 5.0 ns (typ.) at VCC = 5 V • Low power dissipation: ICC = 2 μA (max) at Ta = 25°C • Compatible with TTL outputs: VIL = 0.8 V (max) VIH = 2.0 V (min) • Power down protection is provided on all inputs and outputs. • Balanced propagation delays: tpLH ∼− tpHL • Low noise: VOLP = 0.8 V (max) • Pin and function compatible with the 74 series (74AC/HC/F/ALS/LS etc.) 00 type. Weight SOP14-P-300-1.27A : 0.18 g (typ.) SOL14-P-150-1.27 : 0.12 g (typ.) TSSOP14-P-0044-0.65A : 0.06 g (typ.) VSSOP14-P-0030-0.50 : 0.02 g (typ.) Note: xxxFN (JEDEC SOP) is not available in Japan. TC74VHCT00AF TC74VHCT00AFN TC74VHCT00AFT TC74VHCT00AFK |
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