© 2007 Fairchild Semiconductor Corporation

www.fairchildsemi.com

FAN2103 Rev. 1.0.3

11

Setting the Ramp Resistor Value

2

F

V

10

x

18

V

)

8

.

1

V

(

R

IN

6

OUT

IN

)

K

(

RAMP

−

•

•

•

−

=

−

Ω

(7)

where frequency (F) is expressed in KHz.

Setting the Current Limit

There are two levels of current limit thresholds in

FAN2103. The first level of protection is through an

internal default limit set at the factory to limit output

current beyond normal usage levels. The second level

of protection is a flexible one to be set externally by the

user. Current limit protection is enabled whenever the

lower of the two thresholds is reached. The FAN2103

uses its internal low-side MOSFET as the current-

sensing element. The current-limit threshold voltage

side MOSFET, sampled at the end of each PWM off-

is temperature compensated.

The 10µA current sourced from the ILIM pin can be

used to establish a lower, temperature–dependent,

current-limit threshold by connecting an external

5

.

142

)

I

I

(

K

4

.

10

L

OUT

T

+

Δ

−

•

•

=

2

(8)

where:

low-side MOSFET (Q2) from Figure 8.

After 16 consecutive, pulse-by-pulse, current-limit

cycles, the fault latch is set and the regulator shuts

normal soft-start cycle (refer to Auto-Restart section).

The over-current protection fault latch is active during

Loop Compensation

The loop is compensated using a feedback network

around the error amplifier. Figure 22 shows a complete

Type-3 compensation network. Type-2 compensation

eliminates R3 and C3.

Figure 22. Compensation Network

Because the FAN2103 employs summing current-mode

architecture, Type-2 compensation can be used for

many applications. For applications that require wide

loop bandwidth and/or use very low-ESR output

capacitors, Type-3 compensation may be required.

to compensate the loop. For designs with low input

voltages (3V to 6.5V), it is recommended that separate

and 24V.

Protection

The converter output is monitored and protected

against extreme overload, short-circuit, over-voltage,

and under-voltage conditions.

An internal “Fault Latch” is set for any fault intended to

shut down the IC. When the fault latch is set, the IC

until FB<0.25V. The MOSFET is not turned on again

unless FB>0.5V. This behavior discharges the output

without causing undershoot (negative output voltage).

GATE

DRIVE

PWM

0.25/0.5V

FAULT

PWM LATCH

FB

Figure 23. Latched Fault Response

Under-Voltage Shutdown

If FB remains below the under-voltage threshold for 16

consecutive clock cycles, the fault latch is set and the

converter shuts down. This fault is prevented from

setting the fault latch during soft-start.

Over-Voltage Protection / Shutdown

If FB exceeds 115%

cycles, the fault latch is set and shutdown occurs.

A shorted high-side MOSFET condition is detected

when SW voltage exceeds ~0.7V while the low-side

MOSFET is fully enhanced. The fault latch is set

immediately upon detection.

These two fault conditions are allowed to set the fault

latch at any time, including during soft-start.

Auto-Restart

After a fault, EN is discharged with 1µA to a 1.1V

threshold before the 800K

Ω pull-up is restored. A new

soft-start cycle begins when EN charges above 1.35V.

Depending on the external circuit, the FAN2103 can be

provisioned to remain latched-off or automatically

restart after a fault.