© 2007 Fairchild Semiconductor Corporation

www.fairchildsemi.com

FAN2103 Rev. 1.0.3

10

Circuit Description

Initialization

HIGH, the IC checks for an open or shorted FB pin

before releasing the internal soft-start ramp (SS).

If R1 is open, the error amplifier output (COMP) is forced

LOW and no pulses are generated. After the SS ramp

times out (T1.0), an under-voltage latched fault occurs.

internal SS ramp is not released and the regulator does

not start.

Soft-Start

Once SS has charged to 0.8V (T0.8), the output voltage

is in regulation. Until SS reaches 1.0V (T1.0), the “Fault

Latch” and power-saving mode operations are inhibited.

To avoid skipping the soft-start cycle, it is necessary to

Soft-start time is a function of oscillator frequency.

SS

1.35V

FB

EN

0.8V

T0.8

T1.0

3200 CLKs

4000 CLKs

Fault

Latch

Enable

0.8V

1.0V

2400 CLKs

Figure 21. Soft-Start Timing Diagram

The regulator does not allow the low-side MOSFET to

operate in full synchronous rectification mode until SS

start against pre-biased outputs and ensures that

inductor current does not "ratchet" up during the soft-

start cycle.

resets the IC.

Bias Supply

The FAN2103 requires a 5V supply rail to bias the IC

and provide gate-drive energy and controller power.

Connect a >1.0µf X5R or X7R decoupling capacitor

between VCC and PGND. Whenever EN pin is pulled

turned ON using EN pin with an external control after

sequencing is not relevant.

supply current is frequency and voltage dependent.

)]

128

F

(

)

013

.

0

227

5

V

[(

58

.

4

I

CC

)

mA

(

CC

−

•

+

−

+

=

(1)

where frequency (F) is expressed in KHz.

Setting the Output Voltage

The output voltage of the regulator can be set from 0.8V

The internal reference is 0.8V with 650nA, sourced from

the FB pin to ensure that if the pin is open, the regulator

does not start.

The external resistor divider is calculated using:

nA

650

1

R

V

8

.

0

V

R

V

8

.

0

OUT

BIAS

+

−

=

(2)

To minimize noise on the FB node, the values of R1

parallel impedance of 1K

Ω.

Setting the Frequency

Oscillator frequency is determined by an external resistor,

135

)

R

65

(

10

F

T

6

)

KHz

(

+

•

=

(3)

65

135

)

F

/

10

(

R

6

)

K

(

T

−

=

Ω

(4)

where frequency (F) is expressed in KHz.

Calculating the Inductor Value

Typically the inductor is set for a ripple current (

10% to 35% of the maximum DC load. Regulators

requiring fast transient response use a value on the

high side of this range, while regulators that require very

low output ripple and/or use high-ESR capacitors

restrict allowable ripple current:

F

L

D)

-

(1

V

I

OUT

L

•

•

=

Δ

(5)

where F is the oscillator frequency, and

F

I

D)

-

(1

V

L

L

OUT

•

Δ

•

=

(6)

The selection of inductor influences the entry into

power-saving mode. Consider minimum and maximum

load conditions before inductor selection.