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S-80144CNPF-JK5TFG ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 19 Page - Seiko Instruments Inc

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์ƒ์„ธ๋‚ด์šฉ  ULTRA-SMALL PACKAGE HIGH-PRECISION VOLTAGE DETECTOR WITH DELAY CIRCUIT (INTERNAL DELAY TIME SETTING)
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ULTRA-SMALL PACKAGE HIGH-PRECISION VOLTAGE DETECTOR WITH DELAY CIRCUIT (INTERNAL DELAY TIME SETTING)
Rev.3.3_00
S-801 Series
Seiko Instruments Inc.
19
5. Oscillation
In applications where a resistor is connected to the voltage detector input (Figure 17), taking a
CMOS active low products for example, the through-type current which is generated when the
output goes from low to high (release) causes a voltage drop equal to [through-type current]
ร— [input
resistance] across the resistor. When the input voltage drops below the detection voltage (โ€“VDET) as
a result, the output voltage goes to low level. In this state, the through-type current stops and its
resultant voltage drop disappears, and the output goes from low to high. The through-type current is
again generated, a voltage drop appears, and repeating the process finally induces oscillation.
OUT
VSS
VDD
RB
RA
VIN
S-801
Figure 17 Example for Bad Implementation of Input Voltage Divider
Precautions
โ€ข In the S-801 series products, the through-type current flows at a frequency of 20 kHz approximately
during the delay time since the internal oscillator circuit and counter timer operate at voltage release.
High impedance in the input may cause oscillation by the through-type current. When the input
impedance is high, insert a capacitor between VDD pin and VSS pin to prevent oscillation.
โ€ข Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in
electrostatic protection circuit.
โ€ข In CMOS output products of the S-801 Series, the through-type current flows at detection and release. If
the impedance is high, oscillation may occur due to the voltage drop by the through-type current during
releasing.
โ€ข When designing for mass production using an application circuit described herein, the product deviation
and temperature characteristics should be taken into consideration. SII shall not bear any responsibility
for the patents on the circuits described herein.
โ€ข SII claims no responsibility for any and all disputes arising out of or in connection with any infringement of
the products including this IC upon patents owned a third party.


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