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L6235PD 데이터시트(PDF) 8 Page - STMicroelectronics |
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L6235PD 데이터시트(HTML) 8 Page - STMicroelectronics |
8 / 25 page L6235 8/25 CIRCUIT DESCRIPTION POWER STAGES and CHARGE PUMP The L6235 integrates a Three-Phase Bridge, which consists of 6 Power MOSFETs connected as shown on the Block Diagram. Each Power MOS has an RDS(ON) = 0.3Ω (typical value @25°C) with intrinsic fast freewheeling diode. Switching patterns are gen- erated by the PWM Current Controller and the Hall Effect Sensor Decoding Logic (see relative para- graphs). Cross conduction protection is implemented by using a dead time (tDT = 1µs typical value) set by internal timing circuit between the turn off and turn on of two Power MOSFETs in one leg of a bridge. Pins VSA and VSB MUST be connected together to the supply voltage (VS). Using N-Channel Power MOS for the upper transis- tors in the bridge requires a gate drive voltage above the power supply voltage. The Bootstrapped Supply (VBOOT) is obtained through an internal oscillator and few external components to realize a charge pump circuit as shown in Figure 3. The oscillator output (pin VCP) is a square wave at 600KHz (typically) with 10V amplitude. Recommended values/part numbers for the charge pump circuit are shown in Table1. Table 1. Charge Pump External Component Values. Figure 3. Charge Pump Circuit LOGIC INPUTS Pins FWD/REV, BRAKE, EN, H1, H2 and H3 are TTL/ CMOS and µC compatible logic inputs. The internal structure is shown in Figure 4. Typical value for turn- ON and turn-OFF thresholds are respectively Vth(ON) = 1.8V and Vth(OFF) = 1.3V. Pin EN (enable) may be used to implement Overcurrent and Thermal protection by connecting it to the open col- lector DIAG output If the protection and an external dis- able function are both desired, the appropriate connection must be implemented. When the external signal is from an open collector output, the circuit in Fig- ure 5 can be used . For external circuits that are push pull outputs the circuit in Figure 6 could be used. The re- sistor REN should be chosen in the range from 2.2KΩ to 180K Ω. Recommended values for REN and CEN are re- spectively 100K Ω and 5.6nF. More information for se- lecting the values can be found in the Overcurrent Protection section. Figure 4. Logic Input Internal Structure Figure 5. Pin EN Open Collector Driving Figure 6. Pin EN Push-Pull Driving CBOOT 220nF CP 10nF RP 100 Ω D1 1N4148 D2 1N4148 D2 CBOOT D1 RP CP VS VSA VCP VBOOT VSB D01IN1328 5V D01IN1329 ESD PROTECTION 5V 5V OPEN COLLECTOR OUTPUT REN CEN EN DIAG D02IN1378 ESD PROTECTION 5V PUSH-PULL OUTPUT REN CEN EN D02IN1379 DIAG ESD PROTECTION |
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