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AD8317ACHIPS 데이터시트(PDF) 6 Page - Analog Devices

부품명 AD8317ACHIPS
상세설명  1 MHz to 10 GHz, 55 dB Log Detector/Controller
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AD8317
Rev. B | Page 6 of 20
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
1
INHI
2
COMM
3
CLPF
4
VSET
8INLO
7VPOS
6TADJ
5VOUT
TOP VIEW
(Not to Scale)
AD8317
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
INHI
RF Input. Nominal input range of −50 dBm to 0 dBm, re: 50 Ω; ac-coupled RF input.
2
COMM
Device Common. Connect to a low impedance ground plane.
3
CLPF
Loop Filter Capacitor. In measurement mode, this capacitor sets the pulse response time and video bandwidth.
In controller mode, the capacitance on this node sets the response time of the error amplifier/integrator.
4
VSET
Setpoint Control Input for Controller Mode or Feedback Input for Measurement Mode.
5
VOUT
Measurement and Controller Output. In measurement mode, VOUT provides a decreasing linear-in-dB
representation of the RF input signal amplitude. In controller mode, VOUT is used to control the gain of a VGA or
VVA with a positive gain sense (increasing voltage increases gain).
6
TADJ
Temperature Compensation Adjustment. Frequency-dependent temperature compensation is set by connecting
a ground-referenced resistor to this pin.
7
VPOS
Positive Supply Voltage: 3.0 V to 5.5 V.
8
INLO
RF Common for INHI. AC-coupled RF common.
Paddle
Internally connected to COMM; solder to a low impedance ground plane.


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