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M27V322-150F6 데이터시트(PDF) 7 Page - STMicroelectronics |
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M27V322-150F6 데이터시트(HTML) 7 Page - STMicroelectronics |
7 / 13 page 7/13 M27V322 Table 10. MARGIN MODE AC Characteristics (1) (TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12V ± 0.25V) Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. Table 11. Programming Mode AC Characteristics (1) (TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12V ± 0.25V) Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 2. Sampled only, not 100% tested. Symbol Alt Parameter Test Condition Min Max Unit tA9HVPH tAS9 VA9 High to VPP High 2 µs tVPHEL tVPS VPP High to Chip Enable Low 2µs tA10HEH tAS10 VA10 High to Chip Enable High (Set) 1µs tA10LEH tAS10 VA10 Low to Chip Enable High (Reset) 1µs tEXA10X tAH10 Chip Enable Transition to VA10 Transition 1µs tEXVPX tVPH Chip Enable Transition to VPP Transition 2µs tVPXA9X tAH9 VPP Transition to VA9 Transition 2µs Symbol Alt Parameter Test Condition Min Max Unit tAVEL tAS Address Valid to Chip Enable Low 1 µs tQVEL tDS Input Valid to Chip Enable Low 1 µs tVCHEL tVCS VCC High to Chip Enable Low 2µs tVPHEL tOES VPP High to Chip Enable Low 1µs tVPLVPH tPRT VPP Rise Time 50 ns tELEH tPW Chip Enable Program Pulse Width (Initial) 45 55 µs tEHQX tDH Chip Enable High to Input Transition 2 µs tEHVPX tOEH Chip Enable High to VPP Transition 2µs tVPLEL tVR VPP Low to Chip Enable Low 1µs tELQV tDV Chip Enable Low to Output Valid 1 µs tEHQZ (2) tDFP Chip Enable High to Output Hi-Z 0 130 ns tEHAX tAH Chip Enable High to Address Transition 0 ns Programming When delivered (and after each erasure for UV EPROM), all bits of the M27V322 are in the "1" state. Data is introduced by selectively program- ming "0"s into the desired bit locations. Although only "0"s will be programmed, both "1"s and "0"s can be present in the data word. The only way to change a "0" to a "1" is by die exposition to ultravi- olet light (UV EPROM). The M27V322 is in the programming mode when VPP input is at 12.V, GVPP is at VIH and E is pulsed to VIL. The data to be programmed is applied to 16 bits in parallel to the data output pins. The levels required for the address and data inputs are TTL. VCC is specified to be 6.25V ± 0.25V. |
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