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74LVCE161284VRG4 데이터시트(PDF) 5 Page - Texas Instruments |
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74LVCE161284VRG4 데이터시트(HTML) 5 Page - Texas Instruments |
5 / 16 page www.ti.com Absolute Maximum Ratings (1) Recommended Operating Conditions (1) SN74LVCE161284 19-BIT IEEE STD 1284 TRANSLATION TRANSCEIVER WITH ERROR-FREE POWER UP SCES541 – JANUARY 2004 – REVISED MARCH 2005 over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC CABLE Supply voltage range –0.5 7 V VCC Supply voltage range –0.5 4.6 V Cable side(2)(3) –2 7 V VI, Input and output voltage range VO Peripheral side(2) –0.5 VCC + 0.5 V IIK Input clamp current VI < 0 –20 mA IOK Output clamp current VO < 0 –50 mA Except PERI LOGIC OUT ±50 mA IO Continuous output current PERI LOGIC OUT ±100 mA Continuous current through each VCC or GND ±200 mA ISK Output high sink current VO = 5.5 V and VCC CABLE = 3 V 65 mA DGG package 70 θ JA Package thermal impedance(4) °C/W DL package 63 Tstg Storage temperature range –65 150 °C (1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) The input and output voltage ratings may be exceeded if the input and output current ratings are observed. (3) The ac input-voltage pulse duration is limited to 40 ns if the amplitude is greater than –0.5 V. (4) The package thermal impedance is calculated in accordance with JESD 51-7. MIN MAX UNIT VCC CABLE Supply voltage for the cable side, VCC CABLE ≥ VCC 3 5.5 V VCC Supply voltage 3 3.6 V A, B, DIR, and HD 2 C14–C17 2.3 VIH High-level input voltage V HOST LOGIC IN 2.6 PERI LOGIC IN 2 A, B, DIR, and HD 0.8 C14–C17 0.8 VIL Low-level input voltage V HOST LOGIC IN 1.6 PERI LOGIC IN 0.8 Peripheral side 0 VCC VI Input voltage V Cable side 0 5.5 VO Open-drain output voltage HD low 0 5.5 V HD high, B and Y outputs –14 IOH High-level output current A outputs and HOST LOGIC OUT –4 mA PERI LOGIC OUT –0.5 B and Y outputs 14 IOL Low-level output current A outputs and HOST LOGIC OUT 4 mA PERI LOGIC OUT 84 TA Operating free-air temperature 0 70 °C (1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 5 |
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