MOTOROLA CMOS LOGIC DATA

MC14527B

4

Figure 1. Test Circuit and Timing Diagram

Figure 2. Switching Time Test Circuit and Waveforms

CLOCK

0 1 2 3 4 5 6 7 8 9 0 1 2 3 4

Qa

Qb

Qc

Qd

R1

R2

R3

R4

OUTPUT (PIN 6)

A ENABLED

B ENABLED

C ENABLED

D ENABLED

Eout

OUTPUT (PIN 6)

(PRESET NO. OF 1)

(PRESET NO. OF 2)

(PRESET NO. OF 3)

(PRESET NO. OF 4)

(PRESET NO. OF 5)

(PRESET NO. OF 6)

(PRESET NO. OF 7)

(PRESET NO. OF 8)

(PRESET NO. OF 9)

20 ns

20 ns

tTLH

tTHL

CLOCK

SET

90%

10%

50%

50%

50%

50%

90%

10%

tTLH

tTHL

SET

OUT

ENABLE IN

trem

tsu

tWH

tPHL

tPHL

tPLH

1

fcl

VDD

VSS

MULTIPLIER

PRESET NO.

S

CLEAR

CASC

Ein

CLOCK

ST

A

B

C

D

Eout

OUT

OUT

“9”

PULSE

GENERATOR

PROGRAMMABLE

PULSE

GENERATOR

VDD

VSS

CL

CL

CL

CL

CASC

Ein

CLOCK

ST

A

B

C

D

Eout

OUT

OUT

“9”

S

CLEAR