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Description
Priority
a
Position
Exception Type
Debug monitor (when not halting). This is synchronous, but only active
when enabled. It does not activate if lower priority than the current
activation.
settable
12
Debug Monitor
Reserved.
-
13
-
Pendable request for system service. This is asynchronous and only
pended by software.
settable
14
PendSV
System tick timer has fired. This is asynchronous.
settable
15
SysTick
Asserted from outside the ARM Cortex-M3 core and fed through the NVIC
(prioritized). These are all asynchronous. Table 4-2 on page 42 lists the
interrupts on the LM3S8730 controller.
settable
16 and
above
Interrupts
a. 0 is the default priority for all the settable priorities.
Table 4-2. Interrupts
Description
Interrupt (Bit in Interrupt Registers)
GPIO Port A
0
GPIO Port B
1
GPIO Port C
2
GPIO Port D
3
GPIO Port E
4
UART0
5
UART1
6
SSI0
7
I2C0
8
Watchdog timer
18
Timer0 A
19
Timer0 B
20
Timer1 A
21
Timer1 B
22
Timer2 A
23
Timer2 B
24
System Control
28
Flash Control
29
GPIO Port F
30
GPIO Port G
31
Timer3 A
35
Timer3 B
36
CAN0
39
Ethernet Controller
42
Hibernation Module
43
Reserved
44-47
September 02, 2007
42
Preliminary
Interrupts
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