Table of Contents
About This Document .................................................................................................................... 18
Audience .............................................................................................................................................. 18
About This Manual ................................................................................................................................ 18
Related Documents ............................................................................................................................... 18
Documentation Conventions .................................................................................................................. 18
1
Architectural Overview ...................................................................................................... 20
1.1
Product Features ...................................................................................................................... 20
1.2
Target Applications .................................................................................................................... 26
1.3
High-Level Block Diagram ......................................................................................................... 26
1.4
Functional Overview .................................................................................................................. 27
1.4.1
ARM Cortex™-M3 ..................................................................................................................... 28
1.4.2
Motor Control Peripherals .......................................................................................................... 28
1.4.3
Analog Peripherals .................................................................................................................... 29
1.4.4
Serial Communications Peripherals ............................................................................................ 29
1.4.5
System Peripherals ................................................................................................................... 31
1.4.6
Memory Peripherals .................................................................................................................. 31
1.4.7
Additional Features ................................................................................................................... 32
1.4.8
Hardware Details ...................................................................................................................... 33
2
ARM Cortex-M3 Processor Core ...................................................................................... 34
2.1
Block Diagram .......................................................................................................................... 35
2.2
Functional Description ............................................................................................................... 35
2.2.1
Serial Wire and JTAG Debug ..................................................................................................... 35
2.2.2
Embedded Trace Macrocell (ETM) ............................................................................................. 36
2.2.3
Trace Port Interface Unit (TPIU) ................................................................................................. 36
2.2.4
ROM Table ............................................................................................................................... 36
2.2.5
Memory Protection Unit (MPU) ................................................................................................... 36
2.2.6
Nested Vectored Interrupt Controller (NVIC) ................................................................................ 36
3
Memory Map ....................................................................................................................... 40
4
Interrupts ............................................................................................................................ 42
5
JTAG Interface .................................................................................................................... 44
5.1
Block Diagram .......................................................................................................................... 45
5.2
Functional Description ............................................................................................................... 45
5.2.1
JTAG Interface Pins .................................................................................................................. 46
5.2.2
JTAG TAP Controller ................................................................................................................. 47
5.2.3
Shift Registers .......................................................................................................................... 48
5.2.4
Operational Considerations ........................................................................................................ 48
5.3
Initialization and Configuration ................................................................................................... 51
5.4
Register Descriptions ................................................................................................................ 51
5.4.1
Instruction Register (IR) ............................................................................................................. 51
5.4.2
Data Registers .......................................................................................................................... 53
6
System Control ................................................................................................................... 55
6.1
Functional Description ............................................................................................................... 55
6.1.1
Device Identification .................................................................................................................. 55
6.1.2
Reset Control ............................................................................................................................ 55
3
November 30, 2007
Preliminary
LM3S6916 Microcontroller