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AD7262BCPZ-RL7 데이터시트(PDF) 5 Page - Analog Devices

부품명 AD7262BCPZ-RL7
상세설명  1 MSPS, 12-Bit, Simultaneous Sampling SAR ADC with PGA and Four Comparators
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AD7262BCPZ-RL7 데이터시트(HTML) 5 Page - Analog Devices

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AD7262
Rev. 0 | Page 5 of 32
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
POWER REQUIREMENTS
Digital inputs = 0 V or VDRIVE
AVCC
4.75
5.25
V
CA_CBVCC, CC_CDVCC
2.7
5.25
V
VDRIVE
2.7
5.25
V
IDD
ADC Normal Mode (Static)
20
31.5
mA
AVCC = 5.25 V
ADC Normal Mode (Dynamic)
23
33.3
mA
AVCC = 5.25 V
Shutdown Mode
0.5
1
μA
AVCC = 5.25 V, ADCs and comparators
powered down
Power Dissipation
ADC Normal Mode (Static)
105
165
mW
ADC Normal Mode (Dynamic)
120
175
mW
Shutdown Mode
2.625
5.25
μW
1 These specifications were determined without the use of the gain calibration feature.
2 See the Terminology section.
3 Samples tested during initial release to ensure compliance; they are not subject to production testing.
4 For PGA gain = 1; to use the full analog input range (VCM ± VREF/2) of the AD7262, the VCM voltage should be dropped to lie within a range from 1.95 V to 2.05 V.
5 Refers to Pin VREFA or Pin VREFB.
6 This specification includes the IDD for both comparators. The IDD per comparator is the specified value divided by two.


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