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M40ZTHSMQ1F ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 6 Page - STMicroelectronics

๋ถ€ํ’ˆ๋ช… M40ZTHSMQ1F
์ƒ์„ธ๋‚ด์šฉ  5V or 3V NVRAM supervisor for up to 8 LPSRAMs
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์ œ์กฐ์‚ฌ  STMICROELECTRONICS [STMicroelectronics]
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M40ZTHSMQ1F ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 6 Page - STMicroelectronics

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Description
M40Z300, M40Z300W
6/25
Figure 1.
Logic diagram
1.
For 16-pin SOIC package only.
Table 1.
Signal names
THS
Threshold select input
E
Chip enable input
E1CON - E4CON
Conditioned chip enable output
A, B
Decoder inputs
RST
Reset output (open drain)
BL
Battery low output (open drain)
VOUT
Supply voltage output
VCC
Supply voltage
VSS
Ground
B +
Positive battery pin
B โ€“
Negative battery pin(1)
1.
For M40Z300W, Bโ€“ must be connected to the negative battery terminal only (not to Pin 8, VSS).
NC
Not connected internally
AI02242
THS
VCC
M40Z300
M40Z300W
BL
VSS
E
VOUT
B
A
E1CON
E2CON
E3CON
E4CON
RST
B +
(1)
B โ€“
(1)


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