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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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ADE3800XL 데이터시트(PDF) 9 Page - STMicroelectronics |
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ADE3800XL 데이터시트(HTML) 9 Page - STMicroelectronics |
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9 / 138 page  9/138 ADE3800 General Description The following table gives a brief description of each block of the ADE3800: Table 2: ADE3800 Block Descriptions Block Description Global Control (GLBL) Responsible for selecting clock sources, power control, I²C control and block by block synchronous reset generation Frequency Synthesizer (FSYN) Generates the output clock (also known as the dot clock & DCLK) and the scaler clock (SCLK). Frequency modulation, phase control, and pulse extension (duty cycle control) of the output clock are also provided. Analog-to-Digital Converter (ADC) Has the following features: - Supports input clocks up to 140MHz (SXGA 75Hz) - Adjustable analog amplifier bandwidth - Differential RGB input path for noise immunity - Built-in Sync-on-Green support - Individual RGB clock delay control - Power down control - Linear and independent Gain/Offset adjustment Analog Dithering (ADTH) Generates a 3-bit dither pattern to tune the 10-bit resolution of the ADC block. Line Lock PLL (LLK) Generates the ADC sample clock from an incoming HSync source. Sync Retiming (SRT) Retimes synchronization signals (e.g. HSync and VSync) into either the XCLK or in-clock domains. Input Sync Measurement (SMEAS) Monitors input port activity and measures input sync signals from all sources. Sync Multiplexer (SMUX) Synthesizes clamp and horizontal and vertical enable signals from input sync signals. Selects which signals continue to the scaler block Data Measurement (DMEAS) Measures several characteristics of the pixel data and sync signals. Scale (SCL) Resizes images from one resolution to another. Pattern Generator (PGEN) Provides the ability of displaying a set of useful graphic patterns to help debugging and testing LCD panels. sRGB (SRGB) Performs parametric gamma correction on multiple windows or full screen, used for video enhancement in a window and digital contrast/brightness control. Allows 3D color cube warping RGB color space. Gamma (GAM) Implements three independent 256 point gamma curves for each of R, G, and B channels. On-Screen Display (OSD) Has the following features: - One RAM block 4096x24 is used for the full operation of the OSD. - The characters can be displayed anywhere on the screen. - Horizontal/Vertical Start location for each row in the OSD. - Global Alpha blending for all the characters displayed as well as Alpha blending per color with 16 levels. - Horizontal/Vertical flip based per character. - 1bpp/2bpp/3bpp/4bpp characters supported. - Rotation supported by means of having a 18x12 pixel character or 12x18 pixel character. - Color LUT of 64 colors (24bit RGB True Color) Flicker (FLK) Computes a nonlinear correlation of LCD polarity inversion patterns and the LCD output data stream and provides the correlation results as scores to the microcontroller. Adaptive Phase Control (APC) Generates a 2-bit dither pattern for an 8-bit panel or a 4-bit dither pattern for a 6-bit panel to visually improve the amplitude resolution of the 10-bit RGB output signal. |
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