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LC5768MC-5F672I 데이터시트(PDF) 44 Page - Lattice Semiconductor

부품명 LC5768MC-5F672I
상세설명  3.3V, 2.5V and 1.8V In-System Programmable eXpanded Programmable Logic Device XPLD??Family
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Lattice Semiconductor
ispXPLD 5000MX Family Data Sheet
44
ispXP sysCONFIG Port Timing Specifications
Symbol
Timing Parameter
Min.
Max.
Units
sysCONFIG Write Cycle Timing
tSUCS
Input setup time of CS to CCLK rise
10
ns
tHCS
Hold time of CS to CCLK rise
1
ns
tSUWD
Input setup time of write data to CCLK rise
10
ns
tHWD
Hold time of write data to CCLK rise
0
ns
tPRGM
Low time to reset device SRAM
5
50
ns
tDINIT
INIT delay time
5
ms
tIODISS
User I/O disable
ns
tIOENSS
User I/O enable
ns
tWH
Write clock High pulse width
18
ns
tWL
Write clock Low pulse width
18
ns
fMAXW
Write fMAX
27
MHz
sysCONFIG Read Cycle Timing
tHREAD
Hold time of READ to CCLK rise
1
ns
tSUREAD
Input setup time of READ High to CCLK rise
15
ns
tRH
READ clock high pulse width
18
ns
tRL
READ clock low pulse width
18
ns
fMAXR
Read fMAX
27
MHz
tCORD
Clock to out for read data
25
ns


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