LC87F2708A

No.A1335-2/21

Minimum Bus Cycle Time

Note1

• 100ns (10MHz)

VDD=2.7 to 5.5V

Note2

Minimum Instruction Cycle Time

• 300ns (10MHz)

VDD=2.7 to 5.5V

Note2

Note1: The bus cycle time here refers to the ROM read speed.

Note2: Use this product in a voltage range of 3.0 to 5.5V because the minimum release voltage (PORRL) of the

power-on reset (POR) circuit is 2.87V

±0.12V.

Ports

• I/O ports

Ports whose I/O direction can be designated in 1-bit units 11 (P10 to P16, P30 to P33)

• Reset pins

1 (RES)

• Power pins

2 (VSS1, VDD1)

Timers

• Timer 0: 16-bit timer/counter with a capture register.

Mode 0: 8-bit timer with an 8-bit programmable prescaler (with an 8-bit capture register)

× 2 channels

Mode 1: 8-bit timer with an 8-bit programmable prescaler (with an 8-bit capture register)

+ 8-bit counter (with an 8-bit capture register)

Mode 2: 16-bit timer with an 8-bit programmable prescaler (with a 16-bit capture register)

Mode 3: 16-bit counter (with a 16-bit capture register)

• Timer 1: 16-bit timer/counter that can provide with PWM/toggle outputs

Mode 0: 8-bit timer with an 8-bit prescaler (with toggle outputs) + 8-bit timer/

counter with an 8-bit prescaler (with toggle outputs)

Mode 1: 8-bit PWM with an 8-bit prescaler

× 2 channels

Mode 2: 16-bit timer/counter with an 8-bit prescaler (with toggle outputs)

(toggle output also possible from the lower-order 8 bits)

Mode 3: 16-bit timer with an 8-bit prescaler (with toggle outputs)

(Lower-order 8 bits may be used as PWM)

Serial Interface

• SIO7: 8-bit synchronous serial interface

1) LSB first/MSB first mode selectable

2) Built-in 8-bit baudrate generator (maximum transfer clock cycle=4/3 tCYC)

High-Speed 12-bit PWM

• System clock/high-speed RC oscillation clock (20MHz or 40MHz) operation selectable

• Duty/period programmable

• Continuous PWM output/specific count PWM output (automatic stop) selectable

High-speed Pulse/Period Counter

• HCT1: High-speed RC pulse width/period counter 1

1) System clock/high-speed RC oscillation clock (20MHz or 40MHz) operation selectable

2) H-level width/L-level width/period measurement modes selectable

3) Input triggering noise filter

• HCT2: High-speed pulse width/period counter 2

1) System clock/high-speed RC oscillation clock (20MHz or 40MHz) operation selectable

2) Can measure both L-level width and period simultaneously.

3) Input triggering noise filter

4) Input trigger selectable (from 3 signals, i.e., P11/HCT2IN, P31/HCT2IN, and analog comparator output)

AD Converter: 12 bits

× 7 channels

• 12-/8-bits AD converter resolution selectable

Analog Comparator

• Sends output to the P32/CMPO port (polarity selectable).

• Edge detection function (shared with INTC and also allows the selection of the noise filter function)