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TDA9109S 데이터시트(PDF) 11 Page - STMicroelectronics |
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TDA9109S 데이터시트(HTML) 11 Page - STMicroelectronics |
11 / 30 page B+ SECTION Operating Conditions Symbol Parameter Test conditions Min. Typ. Max. Unit FeedRes Minimum Feedback Resistor Resistor between Pins 15 and 14 5 k Ω Electrical Characteristics (VCC = 12V, Tamb = 25 oC) Symbol Parameter Test conditions Min. Typ. Max. Unit OLG Error Amplifier Open Loop Gain At low frequency (see Note 16) 85 dB ICOMP Sunk Current on Error Amplifier Output when BOUT is in safety condition Pin 14 (see Figure 14) 0.5 mA UGBW Unity Gain Bandwidth (see Note 13) 6 MHz IRI Regulation Input Bias Current Current sourced by Pin 15 (PNP base) 0.2 µA EAOI Error Amplifier Output Current Current sourced by Pin 14 Current sunk by Pin 14 0.5 2 mA mA CSG Current Sense Input Voltage Gain Pin 16 3 MCEth Max Current Sense Input Threshold Voltage Pin 16 1.2 V ISI Current Sense Input Bias Current Current sourced by Pin 16 (PNP base) 1 µA Tonmax Maximum ON Time of the external power transistor % of Horizontal period, f0 = 27kHz (see Note 17) 100 % B+OSV B+ Output Saturation Voltage V28 with I28 = 10mA 0.25 V IVREF Internal Reference Voltage On error amp (+) input for Subaddress 0B Byte 1000000 4.8 V VREFADJ Internal Reference Voltage Adjustment Range Byte 1111111 Byte 0000000 +20 -20 % % tFB+ Fall Time Pin 28 100 ns Notes : 13. These parameters are not tested on each unit. They are measured during our internal qualification. 16. These parameters are not tested on each unit. They are measured during our internal qualification procedure which includes characterization on batches coming from corners of our processes and also temperature characterization. 17. The external power transistor is OFF during about 400ns. HDF DC A B VDF AMP Figure 1 : Vertical Dynamic Focus Function DHPC DC A B SPB PARA Figure 3 : Dynamic Horizontal Phase Control Output EW DC A B EW PARA Figure 2 : E/W Output Keyadj Figure 4 : Keystone Effect on E/W Output (PCC and Corner Inhibited) TDA9109/S 11/30 |
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