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AD5100 데이터시트(PDF) 6 Page - Analog Devices |
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AD5100 데이터시트(HTML) 6 Page - Analog Devices |
6 / 36 page AD5100 Rev. 0 | Page 6 of 36 Parameter Symbol Conditions Min Typ1 Max Unit MR (MANUAL RESET) INPUT MR Input Voltage Low VIL_MR 0.3 × V3MON V MR Input Voltage High VIH_MR 0.7 × V3MON V Input Current 1 μA MR Pulse Width tMR 1 μs MR Deglitching tMR_GLITCH 100 ns MR-to-RESET Delay tMR_DELAY 1 μs MR Pull-Up Resistance (Internal to V3MON) 50 60 75 kΩ RESET Hold Time Tolerance (see and ) Figure 12 Table 8 ΔtRS_HOLD TA = 25°C; does not apply to Code 0x6 and Code 0x7 −10 +10 % TA = −40°C to +125°C; does not apply to Code 0x06 and Code 0x7 −17 +17 % SERIAL INTERFACES Input Logic High (SCL, SDA)6 VIH External RPULL-UP = 2.2 kΩ 2.0 5.5 V Input Logic Low (SCL, SDA) VIL External RPULL-UP = 2.2 kΩ 0 0.8 V Output Logic High (SDA) VOH VRAIL = 2 V to 5.5 V 0.7 × VRAIL V Output Logic Low (SDA) VOL IOL = 3 mA 0 0.4 V Input Current VIN = 0 V to 5.5 V 1 μA Input Capacitance CI 5 pF POWER SUPPLY Supply Voltage Range V1MON 6.0 30 V Sleep Mode Supply Current ISLEEP_V1MON V2MON = 0 V 5 μA Active Mode Supply Current IPOWER_V1MON V2MON = 12 V 2 mA V2MON edge triggered mode selected 2 mA Device Power-On Threshold V2MON, IH 2.2 V V2MON, IL 0.4 V Device Power-Up V2MON, Minimum Pulse Width tV2MON_PW 4 ms Device Power-Down Delay TVREG_OFF_DELAY V2MON < 0.4 V (normal mode) 2 sec I2C-initiated power-down 10 μs OTP Supply Voltage7 VOTP For OTP only 5.5 V OTP Supply Current8 IVOTP For OTP only 84 mA OTP Settling Time9 tS_OTP 12 ms 1 Represent typical values at 25°C, V1MON = 12 V, and V2MON = 12 V. 2 Initial V2MON turn-on minimum remains as 2.2 V but the 3 V to 30 V specifications apply afterward. 3 Does not apply if V2MON is a digital signal. 4 V4MON threshold limits (see Table 6) are designed to primarily allow V4MON to monitor low voltage inputs. The V4MON input pin is capable of withstanding voltages up to 30 V. One application where this 30 V capability is useful is electronic media-oriented systems transport (eMOST) diagnostic circuits. 5 The RESET short-circuit current is the maximum pull-up current when RESET is driven low by a microprocessor bidirectional reset pin. 6 It is typical for the SCL and SDA to have resistors pulled up to V3MON. However, care must be taken to ensure that the minimum VIH is met when the SCL and SDA are driven directly from a low voltage logic controller without pull-up resistors. 7 VOTP can be furnished by an external 5.5 V power supply, rather than an on-board power supply, when performing factory programming. A 10 μF tantalum capacitor is required on VOTP during operation regardless of whether the OTP fuses are programmed. 8 The OTP supply source must be capable of supplying a minimum of 100 mA because some AD5100 parts require a current slightly greater than the typical value of 84 mA. 9 The OTP settling time occurs only once if the OTP function is used. |
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