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A3P030-FVQG144PP ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 60 Page - Actel Corporation

๋ถ€ํ’ˆ๋ช… A3P030-FVQG144PP
์ƒ์„ธ๋‚ด์šฉ  ProASIC3 Flash Family FPGAs
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A3P030-FVQG144PP ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 60 Page - Actel Corporation

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ProASIC3 DC and Switching Characteristics
2- 46
v1.3
Table 2-59 โ€ข Minimum and Maximum DC Input and Output Levels
Applicable to Standard I/O Banks
1.8 V
LVCMOS
VIL
VIH
VOL
VOH
IOL IOH
IOSL
IOSH
IIL
IIH
Drive
Strength Min., V
Max., V
Min., V
Max., V Max., V
Min., V
mA mA
Max.,
mA1
Max.,
mA1
ยตA2 ยตA2
2 mA
โ€“0.3
0.35 * VCCI 0.65 * VCCI
3.6
0.45
VCCI โ€“ 0.45
2
2
9
11
10
10
4 mA
โ€“0.3
0.35 * VCCI 0.65 * VCCI
3.6
0.45
VCCI โ€“ 0.45
4
4
17
22
10
10
Notes:
1. Currents are measured at high temperature (100ยฐC junction temperature) and maximum voltage.
2. Currents are measured at 85ยฐC junction temperature.
3. Software default selection highlighted in gray.
Figure 2-8 โ€ข AC Loading
Table 2-60 โ€ข AC Waveforms, Measuring Points, and Capacitive Loads
Input LOW (V)
Input HIGH (V)
Measuring Point* (V)
CLOAD (pF)
01.8
0.9
35
* Measuring point = Vtrip. See Table 2-22 on page 2-20 for a complete table of trip points.
Test Point
Test Point
Enable Path
Datapath
35 pF
R = 1 k
R to VCCI for tLZ/tZL/tZLS
R to GND for tHZ/tZH/tZHS
35 pF for tZH/tZHS/tZL/tZLS
5 pF for tHZ/tLZ


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