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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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CD74FCT573ATE 데이터시트(PDF) 1 Page - Texas Instruments |
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CD74FCT573ATE 데이터시트(HTML) 1 Page - Texas Instruments |
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1 / 7 page  8-1 Data sheet acquired from Harris Semiconductor SCHS260A Features • Buffered Inputs • Typical Propagation Delay: 3.9ns at VCC = 5V, TA = 25 oC, C L = 50pF (CD74FCT573AT) • SCR Latchup Resistant BiCMOS Process and Circuit Design • FCTXXX Types - Speed of Bipolar FAST™/AS/S • FCTXXXAT Types - 30% Faster than FAST™/AS/S with Significantly Reduced Power Consumption • 48mA Output Sink Current • Output Voltage Swing Limited to 3.7V at VCC = 5V • Controlled Output Edge Rates • Input/Output Isolation to VCC • BiCMOS Technology with Low Quiescent Power Description The CD74FCT573 and CD74FCT573AT octal transparent latches use a small geometry BiCMOS technology. The out- put stage is a combination of bipolar and CMOS transistors that limits the output HIGH level to two diode drops below VCC. This resultant lowering of output swing (0V to 3.7V) reduces power bus ringing (a source of EMI) and minimizes VCC bounce and ground bounce and their effects during simultaneous output switching. The output configuration also enhances switching speed and is capable of sinking 48 milliamperes. The CD74FCT573 and CD74FCT573AT outputs are trans- parent to the inputs when the Latch Enable (LE) is HIGH. When the Latch Enable (LE) goes LOW, the data is latched. The Output Enable (OE) controls the three-state outputs. When the Output Enable (OE) is HIGH, the outputs are in the high impedance state. The latch operation is indepen- dent of the state of the Output Enable. Ordering Information Pinout PART NUMBER TEMP. RANGE (oC) PACKAGE PKG. NO. CD74FCT573ATE 0 to 70 20 Ld PDIP E20.3 CD74FCT573M 0 to 70 20 Ld SOIC M20.3 CD74FCT573SM 0 to 70 20 Ld SSOP M20.209 NOTE: When ordering the suffix M and SM packages, use the entire part number. Add the suffix 96 to obtain the variant in the tape and reel. CD74FCT573, CD74FCT573AT (PDIP, SOIC, SSOP) TOP VIEW 11 12 13 14 15 16 17 18 20 19 10 9 8 7 6 5 4 3 2 1 OE D0 D1 D2 D3 D4 D6 D5 D7 GND VCC Q1 Q2 Q3 Q4 Q5 Q6 Q7 LE Q0 January 1997 CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. FAST™ is a trademark of Fairchild Semiconductor. Copyright © Harris Corporation 1997 CD74FCT573, CD74FCT573AT BiCMOS FCT Interface Logic, Octal Transparent Latches, Three-State NOT RECOMMENDED FOR NEW DESIGNS Use CMOS Technology File Number 2304.2 CD74FCT573AT was not acquired from Harris Semiconductor. |
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유사한 설명 - CD74FCT573ATE |
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