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SMJ320F240 데이터시트(PDF) 1 Page - Texas Instruments |
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SMJ320F240 데이터시트(HTML) 1 Page - Texas Instruments |
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1 / 99 page  Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. SMJ320F240 DSP CONTROLLER SGUS029 – APRIL 1999 1 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 D Processed to MIL–PRF–38535 (QML) D High-Performance Static CMOS Technology D Includes the T320C2xLP Core CPU – Object Compatible With the TMS320C2xx Family – Source Code Compatible With SMJ320C25 – Upwardly Compatible With SMJ320C50 – 50-ns Instruction Cycle Time D Memory – 544 Words × 16 Bits of On-Chip Data/Program Dual-Access RAM – 16K Words × 16 Bits of On-Chip Program Flash EEPROM – 224K Words × 16 Bits of Total Memory Address Reach (64K Data, 64K Program and 64K I/O, and 32K Global Memory Space) D Event-Manager Module – 12 Compare / Pulse-Width Modulation (PWM) Channels – Three 16-Bit General-Purpose Timers With Six Modes, Including Continuous Up and Up / Down Counting – Three 16-Bit Full-Compare Units With Deadband – Three 16-Bit Simple-Compare Units – Four Capture Units (Two With Quadrature Encoder-Pulse Interface Capability) D Dual 10-Bit Analog-to-Digital Conversion Module D 28 Individually Programmable, Multiplexed I / O Pins D Phase-Locked-Loop (PLL)-Based Clock Module D Watchdog Timer Module (With Real-Time Interrupt) D Serial Communications Interface (SCI) Module D Serial Peripheral Interface (SPI) Module D Six External Interrupts (Power Drive Protect, Reset, NMI, and Three Maskable Interrupts) D Four Power-Down Modes for Low-Power Operation D Scan-Based Emulation D Development Tools Available: – Texas Instruments (TI ™) ANSI C Compiler, Assembler / Linker, and C-Source Debugger – Scan-Based Self-Emulation (XDS510 ™) – Third-Party Digital Motor Control and Fuzzy-Logic Development Support D –55°C to 125°C Operating Temperature Range, QML Processing D 132-Pin Ceramic Quad Flat Package (HFP Suffix) description The SMJ320F240 is the first member of a new family of digital signal processor (DSP) controllers based on the TMS320C2xx generation of 16-bit fixed-point DSPs. This new family is optimized for digital motor/motion control applications and contains 16K words of flash memory on chip. The DSP controller combines the enhanced TMS320 architectural design of the ’C2xLP core CPU for low-cost, high-performance processing capabilities and several advanced peripherals optimized for motor/motion control applications. These peripherals include the event manager module, which provides general-purpose timers and compare registers to generate up to 12 PWM outputs, and a dual 10-bit analog-to-digital converter (ADC), which can perform two simultaneous conversions within 6.1 µs. On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. Copyright © 1999, Texas Instruments Incorporated TI and XDS510 are trademarks of Texas Instruments Incorporated. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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