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TDA9951 데이터시트(PDF) 8 Page - NXP Semiconductors

부품명 TDA9951
상세설명  CEC/I2C-bus translator
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TDA9951_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 7 August 2008
8 of 41
NXP Semiconductors
TDA9951
CEC/I2C-bus translator
This register enables the host processor to read the TDA9951 software version.
Table 9.
CVR - Common version register (address 02h) bit description
Bit
Symbol
Access
Value
Description
7 to 4
CVR_MAJ[3:0]
R
-
major version
3 to 0
CVR_MIN[3:0]
R
-
minor version
Table 10.
CCR - Common control register (address 03h) bit description
Bit
Symbol
Access
Value
Description
7
RESET
R/W
0
no action
W
1
resets the TDA9951 and returns it to its power-up
state. CEC transmissions are completed before the
reset. Only performed when the TDA9951 is in Idle
mode, restores all default values.
6
CEC
R/W
0
default; the CEC interface is disabled after
completion or reception of a pending CEC
transmission. Further messages on the CEC line
and messages for transmission are no longer
acknowledged or accepted.
1
The CEC interface is enabled and acknowledges
messages based on the contents of the CEC
address ACK high and address ACK low registers.
5
RC5
R/W
0
default; ignores RC5 commands from the IRX
interface
1
accepts RC5 commands
4
RC6
R/W
0
default; ignores RC6 commands from the IRX
interface
1
accepts RC6 commands
3
KEY
R/W
0
default; key matrix is disabled
1
key matrix is enabled
2
VFD
R/W
0
default; VFD display output is disabled
1
VFD display output is enabled
1
not used
-
0
not used
0
SBY
R/W
1
enters Standby mode and sets the SBY output. This
bit is then cleared automatically. The common status
register SBY bit indicates the SBY output state
Table 11.
ACKH - CEC address ACK high register (address 04h) bit description
Bit
Symbol
Access
Value
Description
7
reserved
R
0
reserved; must be set to 0
6 to 0
ACKH[6:0]
R/W
for each bit:
0
messages are not acknowledged
1
messages are acknowledged and forwarded to
the host


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