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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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TDA9984A 데이터시트(PDF) 1 Page - NXP Semiconductors |
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TDA9984A 데이터시트(HTML) 1 Page - NXP Semiconductors |
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1 / 40 page  1. General description The TDA9984A is a High-Definition Multimedia Interface (HDMI) v. 1.3 transmitter with embedded 1080p upscaling functionality. It is backward compatible DVI 1.0 and can be connected to any DVI 1.0 and HDMI sink. It allows mixing a 3 × 8-bit RGB or YCbCr video stream with a pixel rate up to 150 MHz together with up to 4 × I2S-bus or one S/PDIF audio streams with an audio sampling rate up to 192 kHz. It supports Gamut boundary description (xvYCC), as well as HD audio, both HDMI 1.3 features. A programmable upscaling block allows creating a 1080p output from a standard definition input. An intrafield deinterlacer is included in the scaler. In order to be compatible with most applications, and thanks to the integration of a fully programmable input formatter and color space conversion block, the video input formats accepted also include YCbCr 4 :4:4 (up to 3 × 8-bit), YCbCr 4:2:2 semi-planar (up to 2 × 12-bit) and YCbCr 4 :2:2 compliant with ITU656 (up to 1 × 12-bit). In case of ITU656-like format, the input pixel clock can be made active on both edges. The TDA9984A includes a HDCP 1.2 compliant cipher block. The HDCP key are stored internally in a non-volatile OTP memory for maximum security. The TDA9984A includes a true I2C-bus master interface for DDC-bus communication for EDID purpose and HDCP purpose. The TDA9984A can be controlled by an I2C-bus interface. 2. Features I 3 × 8-bit video data input buses; CMOS and LV-TTL compatible I Horizontal synchronization, vertical synchronization and data enable inputs or VREF, HREF and FREF inputs which can be used for synchronization I Pixel rate clock input can be made active on one or both edges; selectable via I2C-bus I 4 × I2S-bus audio input channels, one S/PDIF channel; audio data rate up to 192 kHz per input for both standards I Dolby-True HD and DTS-HD High bit rate audio support through the use of the HBR interface I 250 MHz to 1.50 GHz TMDS transmitter operation I Programmable input formatter and upsampler/interpolator allows input of any of the 4:4:4 or 4:2:2 semi-planar and 4 :2:2 ITU656-like formats TDA9984A HDMI 1.3 transmitter with 1080p upscaler embedded Rev. 04 — 15 January 2009 Product data sheet |
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