SN74ABT3613

64

× 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY

WITH BUS MATCHING AND BYTE SWAPPING

SCBS128F – JULY 1992 – REVISED APRIL 1998

1

POST OFFICE BOX 655303

Asynchronous or Coincident

Port B

Direction

Word), 18 Bits (Word), and 9 Bits (Byte)

Word and Byte Bus Sizes

Port B

Almost-Empty Flags

Port

Quad Flat (PCB) and 132-Pin Quad Flat

(PQ) Packages

description

The SN74ABT3613 is a high-speed, low-power BiCMOS clocked FIFO memory. It supports clock frequencies

up to 67 MHz and has read-access times as fast as 10 ns. A 64

× 36 dual-port SRAM FIFO in this device buffers

data from port A to port B. The FIFO has flags to indicate empty and full conditions and two programmable flags

(almost full and almost empty) to indicate when a selected number of words is stored in memory. FIFO data on

port B can be output in 36-bit, 18-bit, and 9-bit formats, with a choice of big- or little-endian configurations. Three

modes of byte-order swapping are possible with any bus-size selection. Communication between each port can

bypass the FIFO via two 36-bit mailbox registers. Each mailbox register has a flag to signal when new mail has

been stored. Parity is checked passively on each port and can be ignored if not desired. Parity generation can

be selected for data read from each port.

The SN74ABT3613 is a clocked FIFO, which means each port employs a synchronous interface. All data

transfers through a port are gated to the low-to-high transition of a continuous (free-running) port clock by enable

signals. The continuous clocks for each port are independent of one another and can be asynchronous or

coincident. The enables for each port are arranged to provide a simple interface between microprocessors

and/or buses controlled by a synchronous interface.

The full flag (FF) and almost-full (AF) flag of a FIFO are two-stage synchronized to the port clock that writes data

to its array. The empty flag (EF) and almost-empty (AE) flag of a FIFO are two-stage synchronized to the port

clock that reads data from its array.

The SN74ABT3613 is characterized for operation from 0

°C to 70°C.

For more information on this device family, see the following application reports:

(literature number SCAA007)

(literature number SCAA014)

(literature number SCAA015)

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Copyright

© 1998, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.