TLC2942

HIGH-PERFORMANCE DUAL PHASE-LOCKED LOOP BUILDING BLOCK

SLAS146B – NOVEMBER 1996 – REVISED JUNE 1997

6

POST OFFICE BOX 655303

PFD output control

A high level on PFD INHIBIT places the PFD OUT in the high-impedance state and the PFD stops phase

detection as shown in Table 4 and Table 5. A high level on PFD INHIBIT also can be used as the power-down

mode for the PFD.

Table 4. PFD1 Inhibit Function

PFD INHIBIT1

DETECTION

PFD OUT1

PFD1 IDD

Low

Active

Active

Normal

High

Stop

Hi-Z

Power Down

Table 5. PFD2 Inhibit Function Table

PFD INHIBIT2

DETECTION

PFD OUT2

PFD2 IDD

Low

Active

Active

Normal

High

Stop

Hi-Z

Power Down

schematics

VCO block schematic (VCO1, VCO2)

Bias

Circuit

VCO

Output

1/2

RBIAS

VCOIN1,

VCOIN2

(VCO control)

VCOINHIBIT

VCO OUT1,

VCO OUT2

SELECT1,2

M

U

X

Ring Oscillator

PFD block schematic (PFD1, PFD2)

Detector

Charge Pump

PFD OUT

FIN –A

FIN –B

PFD INHIBIT

VDD