전자부품 데이터시트 검색엔진 |
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UC3178 데이터시트(PDF) 4 Page - Texas Instruments |
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UC3178 데이터시트(HTML) 4 Page - Texas Instruments |
4 / 6 page A & B OUT: Outputs for the A & B power amplifiers, providing differential drive to the load during normal op- eration. During a UVLO, Inhibit, or O/C condition both of these outputs will be in a high, source only state. High- side diodes are included to catch inductive load currents flowing into these pins, inductive kicks on the low-side are caught by the high-side output transistors. AIN(+): Non-inverting input to the A amplifier. Normally tied to the REF Input when the current sense amplifier is used. AIN(-): Inverting input to the A amplifier. Used as the sum- ming node to close the loop on the overall power amplifier. BIN(+): Non-inverting input to the B amplifier. This pin nor- mally sets the reference point for the differential voltage swing at the load. BIN(-): Inverting input to the B amplifier. Used to program the gain of the B amplifier. COMP ADJ: The compensation adjust pin allows the user to provide an auxiliary compensation network for the A am- plifier that is only active when the current sense amplifier is in the low range. With this option, the user can control the change in bandwidth that would otherwise result from the gain change in the feedback loop. C/S(+): The non-inverting input to the current sense ampli- fier is typically tied to the load side of the series current sense resistor. This pin can be pulled below ground during an abrupt load current change with an inductive load. Proper operation of the current sense amplifier will result if this pin does not go below ground by an amount greater than: (REF Input / 2 ) - 0.3V. C/S(-): The inverting input to the current sense amplifier is typically tied to the connection between the B amplifier output and the current sense resistor that is in series with the load. C/S Output: The output of the current sense amplifier has a 1.5mA current source pull-up and an active NPN pull- down. The output will pull to within 0.3V of either rail with a load current of less than 1mA. GND: Reference point for the internal reference, O/C comparator, and other low-level circuitry. IDIF OUT: Current source output pin. The value of the out- put current is nominally equal to the magnitude of the current through the IDIF REF pin. IDIF REF: Output of the IDIF sense buffer. Voltage on this pin will track the applied voltage on the REF Input pin. Current through this pin is full wave rectified and appears as a current sourced from the IDIF OUT pin. Inhibit : A high impedance logic input that disables the A and B power amplifiers, the IDIF sense buffer, and the Current Sense amplifier. This input has an internal pull-up that will inhibit the device if the input is left open. O/C Force: Logic input that forces the O/C condition. O/C IND: Open collector ouput that indicates, with an ac- tive low state, an O/C condition. O/C Sense: Input to the Over Current Comparator. When this input is above its 1V threshold the low-side devices of both the A & B power amplifiers will be disabled forcing a high, source only, state at both outputs. PWR GND: Current return for all high level circuitry, this pin should be connected to the same potential as GND. Range: When this pin is open or at a logic low potential, the current sense amplifier will be in its low range mode. In this mode the voltage gain of the amplifier will be 2. If this pin is brought to a logic high, the gain of the current sense amplifier will change into its high range value of 0.5. This factor of four change in gain will vary the overall transconductance of the power amplifier by the same ra- tio, with the transconductance being the highest in the high mode. This feature allows improved dynamic range of load current control for a given control input range and resolution. REF Input: Sets the Reference level at the C/S Output, and is normally tied to the system reference level for in- puts to the power amplifier. VIN(+): Provides bias supply to the device. The High-Side drive to the power stages on both the A and B amplifiers is referenced to this pin. The High-side saturation volt- ages, and UVLO are specified and measured with respect to this supply pin. VC(+): This supply pin is the high current supply to the collectors of the high-side NPN output devices on the A and B amplifiers. This supply should be powered when- ever the A or B amplifiers are to be activated. This pin can operate approximately 400mV below the VIN(+) supply without affecting the voltage available to the load. UC3178 PIN DESCRIPTIONS: 4 |
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