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SA303-IHZ 데이터시트(PDF) 1 Page - Cirrus Logic |
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SA303-IHZ 데이터시트(HTML) 1 Page - Cirrus Logic |
1 / 14 page SA303 SA303U P r o d u c t I n n o v a t i o n F r o m DESCRIPTION The SA303 is a fully integrated switching amplifier designed primarily to drive three-phase Brushless DC (BLDC) motors. Three independent half bridges provide over 10 amperes peak output current under microcontroller or DSC control. Thermal and short cir- cuit monitoring is provided, which generates fault sig- nals for the microcontroller to take appropriate action. A block diagram is provided in Figure 1. Additionally, cycle-by-cycle current limit offers user programmable hardware protection independent of the microcontroller. Output current is measured using an innovative low loss technique. The SA303 is built using a multi-technology process allowing CMOS logic con- trol and complementary DMOS output power devices on the same IC. Use of P-channel high side FETs en- ables 60V operation without bootstrap or charge pump circuitry. The Power Quad surface mount package balances ex- cellent thermal performance with the advantages of a low profile surface mount package. FEATURES ♦ Low Cost 3 Phase Intelligent Switching Amplifier ♦ Directly Connects to Most Embedded Micro- controllers and Digital Signal Controllers ♦ Integrated Gate Driver Logic with Dead-Time Generation and Shoot-through Prevention ♦ Wide Power Supply Range (8.5V To 60V) ♦ Over 10A Peak Output Current per Phase ♦ 3A Continuous Output Current per Phase ♦ Independent Current Sensing for each Output ♦ User Programmable Cycle-by-cycle Current Limit Protection ♦ Over-Current and Over-Temperature Warning Signals APPLICATIONS ♦ 3 phase brushless DC motors ♦ Multiple DC brush motors ♦ 3 independent solenoid actuators 3 Phase Switching Amplifier SA303 P r o d u c t I n n o v a t i o n F r o m FIgURE.BLOCKDIAgRAm Copyright © Cirrus Logic, Inc. 2009 (All Rights Reserved) http://www.cirrus.com mAY2009 APEX − SA303UREVA SA303 Switching Amplifier Vs (phase A) PG ND(A&B) Gate Control PWM Signals A B C O ut A O ut B O ut C PG ND(C) TEM P GND Vs (phase B&C) V S + I LIM/D IS 1 SC DIS2 SG ND Phase A Phase C Phase B Control Logic V DD Ia' Ib' Ic' Ia' Ib' Ic' Fault Logic Ia Ic Ib At Ab Bt Bb Ct Cb V DD V DD V DD |
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