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STM32F103RBH7TR ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 57 Page - STMicroelectronics

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์ƒ์„ธ๋‚ด์šฉ  Medium-density performance line ARM-based 32-bit MCU with 64 or 128 KB Flash, USB, CAN, 7 timers, 2 ADCs, 9 communication interfaces
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STM32F103x8, STM32F103xB
Electrical characteristics
Doc ID 13587 Rev 11
57/92
5.3.12
I/O port characteristics
General input/output characteristics
Unless otherwise specified, the parameters given in Table 34 are derived from tests
performed under the conditions summarized in Table 9. All I/Os are CMOS and TTL
compliant.
All I/Os are CMOS and TTL compliant (no software configuration required), their
characteristics consider the most strict CMOS-technology or TTL parameters:
โ—
For VIH:
โ€“if VDD is in the [2.00 V - 3.08 V] range: CMOS characteristics but TTL included
โ€“if VDD is in the [3.08 V - 3.60 V] range: TTL characteristics but CMOS included
โ—
For VIL:
โ€“if VDD is in the [2.00 V - 2.28 V] range: TTL characteristics but CMOS included
โ€“if VDD is in the [2.28 V - 3.60 V] range: CMOS characteristics but TTL included
Table 34.
I/O static characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIL
Input low level voltage
TTL ports
โ€“0.5
0.8
V
VIH
Standard IO input high level
voltage
2VDD+0.5
IO FT(1) input high level voltage
1.
FT = Five-volt tolerant.
25.5V
VIL
Input low level voltage
CMOS ports
โ€“0.5
0.35 VDD
V
VIH
Input high level voltage
0.65 VDD
VDD+0.5
Vhys
Standard IO Schmitt trigger
voltage hysteresis(2)
2.
Hysteresis voltage between Schmitt trigger switching levels. Based on characterization, not tested in
production.
200
mV
IO FT Schmitt trigger voltage
hysteresis(2)
5% VDD
(3)
3.
With a minimum of 100 mV.
mV
Ilkg
Input leakage current (4)
4.
Leakage could be higher than max. if negative current is injected on adjacent pins.
VSS ๏‚ฃ VIN ๏‚ฃ VDD
Standard I/Os
๏‚ฑ1
ยตA
VIN= 5 V
I/O FT
3
RPU
Weak pull-up equivalent
resistor(5)
5.
Pull-up and pull-down resistors are designed with a true resistance in series with a switchable
PMOS/NMOS. This MOS/NMOS contribution to the series resistance is minimum (~10% order)
.
VIN ๏€ฝ๏€ VSS
30
40
50
k
๏—
RPD
Weak pull-down equivalent
resistor(5)
VIN ๏€ฝ๏€ VDD
30
40
50
k
๏—
CIO
I/O pin capacitance
5
pF


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