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ST7565S 데이터시트(PDF) 2 Page - Sitronix Technology Co., Ltd. |
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ST7565S 데이터시트(HTML) 2 Page - Sitronix Technology Co., Ltd. |
2 / 72 page ST7565S Ver 0.6c 2/72 2009/09/07 S ST T7 75 56 65 5S S P Pa ad d A Arrrra an ng ge em me en ntt((C CO OG G)) Chip Size 9,336 µm x 1,000µm Bump Pitch 58 µm (Min.) Bump Height 18 µm(Typ) Chip Thickness 635 µm PAD No Bump Size 001 ~ 012 40 µm x 90µm 013 ~ 102 56 µm x 60µm 103 ~ 114 40 µm x 90µm 115 90 µm x 25.5µm 116 ~ 128 90 µm x 40µm 129 ~ 276 40 µm x 90µm 277 ~ 289 90 µm x 40µm 290 90 µm x 25.5µm Use select pin to define display duty as following table SEL 3 , 2 , 1 DUTY BIAS 0 , 0 , 0 1/65 1/9 or 1/7 0 , 0 , 1 1/49 1/8 or 1/6 0 , 1 , 0 1/33 1/6 or 1/5 0 , 1 , 1 1/55 1/8 or 1/6 1 , 0 , 0 1/53 1/8 or 1/6 1, X , X ----- ----- |
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