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DM9000A 데이터시트(PDF) 6 Page - Davicom Semiconductor, Inc. |
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DM9000A 데이터시트(HTML) 6 Page - Davicom Semiconductor, Inc. |
6 / 60 page DM9000A Ethernet Controller with General Processor Interface Final 6 Version: DM9000A-17-DS-F01 May 10, 2006 1. General Description The DM9000A is a fully integrated and cost-effective low pin count single chip Fast Ethernet controller with a general processor interface, a 10/100M PHY and 4K Dword SRAM. It is designed with low power and high performance process that support 3.3V with 5V IO tolerance. The DM9000A supports 8-bit and 16-bit data interfaces to internal memory accesses for various processors. The PHY of the DM9000A can interface to the UTP3, 4, 5 in 10Base-T and UTP5 in 100Base-TX with HP Auto-MDIX. It is fully compliant with the IEEE 802.3u Spec. Its auto-negotiation function will automatically configure the DM9000A to take the maximum advantage of its abilities. The DM9000A also supports IEEE 802.3x full- duplex flow control.. 2. Block Diagram EEPROM Interface AUTO-MDIX LED TX+/- RX+/- MII Management Control & MII Register Autonegotiation Memory Management RX Machine TX Machine MAC MII 100 Base-TX PCS 100 Base-TX transceiver 10 Base-T Tx/Rx PHYceiver Control &Status Registers Internal SRAM |
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